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FM28V102-TG 数据表(PDF) 3 Page - Cypress Semiconductor

部件名 FM28V102-TG
功能描述  1Mbit (64Kx16)F-RAM Memory
Download  16 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

FM28V102-TG 数据表(HTML) 3 Page - Cypress Semiconductor

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FM28V102 - 64Kx16 F-RAM
Document Number: 001-86601 Rev. **
Page 3 of 16
Table 1. Functional Truth Table
1,2
/CE
/WE
A(15:2)
A(1:0)
/ZZ
Operation
X
X
X
X
L
Sleep Mode
H
X
X
X
X
X
X
X
H
Standby/Idle
L
H
H
V
V
V
V
H
Read
L
H
No Change
Change
H
Page Mode Read
L
H
Change
V
H
Random Read
L
L
L
V
V
V
V
H
/CE-Controlled Write
2
L
V
V
H
/WE-Controlled Write
2, 3
L
No Change
V
H
Page Mode Write
4
L
X
X
X
X
X
X
H
Starts Precharge
Notes:
1)
H=Logic High, L=Logic Low, V=Valid Data, X=Don’t Care.
2)
For write cycles, data-in is latched on the rising edge of /CE or /WE, whichever comes first.
3)
/WE-controlled write cycle begins as a Read cycle and A(15:2) is latched then.
4)
Addresses A(1:0) must remain stable for at least 15 ns during page mode operation.
Table 2. Byte Select Truth Table
/WE
/OE
/LB
/UB
Operation
H
H
X
X
Read; Outputs Disabled
X
H
H
H
L
H
L
Read upper byte; Hi-Z lower byte
L
H
Read lower byte; Hi-Z upper byte
L
L
Read both bytes
L
X
H
L
Write upper byte; Mask lower byte
L
H
Write lower byte; Mask upper byte
L
L
Write both bytes
The /UB and /LB pins may be grounded if 1) the system does not perform byte writes
and 2) the device is not configured as a 128Kx8.
Simplified Sleep/Standby State Diagram
Initialize
Normal
Operation
Standby
Sleep
Power
Applied
/ZZ low
/ZZ high
/CE high,
/ZZ high
/CE low,
/ZZ high
/CE low,
/ZZ high
/ZZ low
/CE high,
/ZZ high


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