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SN74ALVCH162601DLR 数据表(PDF) 6 Page - Texas Instruments |
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SN74ALVCH162601DLR 数据表(HTML) 6 Page - Texas Instruments |
6 / 15 page www.ti.com TIMING REQUIREMENTS SWITCHING CHARACTERISTICS OPERATING CHARACTERISTICS SN74ALVCH162601 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES026H – JULY 1995 – REVISED AUGUST 2004 over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 through Figure 3) VCC = 2.5 V VCC = 3.3 V VCC = 1.8 V VCC = 2.7 V ± 0.2 V ± 0.3 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX fclock Clock frequency (1) 140 150 150 MHz LE high (1) 3.3 3.3 3.3 tw Pulse duration ns CLK high or low (1) 3.3 3.3 3.3 Data before CLK ↑ (1) 2.3 2.4 2.1 CLK high (1) 2 1.6 1.6 tsu Setup time Data before LE ↓ ns CLK low (1) 1.3 1.2 1.1 CLKEN before CLK ↑ (1) 2 2 1.7 Data after CLK ↑ (1) 0.7 0.7 0.8 CLK high (1) 1.3 1.6 1.4 th Hold time Data after LE ↓ ns CLK low (1) 1.7 2 1.7 CLKEN after CLK ↑ (1) 0.3 0.5 0.6 (1) This information was not available at the time of publication. over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 through Figure 3) VCC = 2.5 V VCC = 3.3 V VCC = 1.8 V VCC = 2.7 V FROM TO ± 0.2 V ± 0.3 V PARAMETER UNIT (INPUT) (OUTPUT) MIN TYP MIN MAX MIN MAX MIN MAX fmax x (1) 140 150 150 MHz A B (1) 1.3 4.8 5.2 1.6 4.5 B A (1) 1 4.3 4.6 1 4.1 LEAB B (1) 1 5.5 5.9 1.5 5.1 tpd ns LEBA A (1) 1 5 5.3 1 4.7 CLKAB B (1) 1.5 6.1 6.3 1.6 5.5 CLKBA A (1) 1.3 5.6 5.8 1.4 5 ten OEAB B (1) 1.6 6.1 6.7 1.6 5.7 ns tdis OEAB B (1) 1.8 5.7 5.3 1.8 4.8 ns ten OEBA A (1) 1.1 5.5 6.1 1.1 5.2 ns tdis OEBA A (1) 1.3 5.2 4.8 1.6 4.4 ns (1) This information was not available at the time of publication. T A = 25°C VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V PARAMETER TEST CONDITIONS UNIT TYP TYP TYP Outputs enabled (1) 41 50 Power dissipation Cpd CL = 50 pF, f = 10 MHz pF capacitance Outputs disabled (1) 6 6 (1) This information was not available at the time of publication. 6 |
类似零件编号 - SN74ALVCH162601DLR |
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类似说明 - SN74ALVCH162601DLR |
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