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LCMXO2-256ZE-3MG132C 数据表(PDF) 46 Page - Lattice Semiconductor |
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LCMXO2-256ZE-3MG132C 数据表(HTML) 46 Page - Lattice Semiconductor |
46 / 106 page 3-7 DC and Switching Characteristics MachXO2 Family Data Sheet sysIO Recommended Operating Conditions Standard VCCIO (V) VREF (V) Min. Typ. Max. Min. Typ. Max. LVCMOS 3.3 3.135 3.3 3.465 — — — LVCMOS 2.5 2.375 2.5 2.625 — — — LVCMOS 1.8 1.71 1.8 1.89 — — — LVCMOS 1.5 1.425 1.5 1.575 — — — LVCMOS 1.2 1.14 1.2 1.26 — — — LVTTL 3.135 3.3 3.465 — — — PCI 3 3.135 3.3 3.465 — — — SSTL25 2.375 2.5 2.625 1.15 1.25 1.35 SSTL18 1.71 1.8 1.89 0.833 0.9 0.969 HSTL18 1.71 1.8 1.89 0.816 0.9 1.08 LVDS25 1, 2 2.375 2.5 2.625 — — — LVDS33 1, 2 3.135 3.3 3.465 — — — LVPECL 1 3.135 3.3 3.465 — — — BLVDS 1 2.375 2.5 2.625 — — — RSDS 1 2.375 2.5 2.625 — — — SSTL18D 1.71 1.8 1.89 — — — SSTL25D 2.375 2.5 2.625 — — — HSTL18D 1.71 1.8 1.89 — — — 1. Inputs on-chip. Outputs are implemented with the addition of external resistors. 2. MachXO2-640U, MachXO2-1200/U and larger devices have dedicated LVDS buffers 3. Input on the bottom bank of the MachXO2-640U, MachXO2-1200/U and larger devices only. |
类似零件编号 - LCMXO2-256ZE-3MG132C |
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类似说明 - LCMXO2-256ZE-3MG132C |
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