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LCMXO2-256ZE-3SG32C 数据表(PDF) 41 Page - Lattice Semiconductor

部件名 LCMXO2-256ZE-3SG32C
功能描述  MachXO2??Family Data Sheet
Download  106 Pages
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制造商  LATTICE [Lattice Semiconductor]
网页  http://www.latticesemi.com
标志 LATTICE - Lattice Semiconductor

LCMXO2-256ZE-3SG32C 数据表(HTML) 41 Page - Lattice Semiconductor

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3-2
DC and Switching Characteristics
MachXO2 Family Data Sheet
Power-On-Reset Voltage Levels
1, 2, 3, 4
Programming/Erase Specifications
Hot Socketing Specifications
1, 2, 3
ESD Performance
Please refer to the MachXO2 Product Family Qualification Summary for complete qualification data, including ESD
performance.
Symbol
Parameter
Min.
Typ.
Max.
Units
VPORUP
Power-On-Reset ramp up trip point (band gap based circuit
monitoring VCCINT and VCCIO)
0.9
1.06
V
VPORUPEXT
Power-On-Reset ramp up trip point (band gap based circuit
monitoring external VCC power supply)
1.5
2.1
V
VPORDNBG
Power-On-Reset ramp down trip point (band gap based circuit
monitoring VCCINT)
0.93
V
VPORDNSRAM
Power-On-Reset ramp down trip point (SRAM based circuit
monitoring VCCINT)
—0.6
V
1. These POR trip points are only provided for guidance. Device operation is only characterized for power supply voltages specified under rec-
ommended operating conditions.
2. For devices without voltage regulators VCCINT is the same as the VCC supply voltage. For devices with voltage regulators, VCCINT is regu-
lated from the VCC supply voltage.
3. Note that VPORUP (min.) and VPORDNBG (max.) are in different process corners. For any given process corner VPORDNBG (max.) is always
12.0mV below VPORUP (min.).
4. VPORUPEXT is for HC devices only. In these devices a separate POR circuit monitors the external VCC power supply.
Symbol
Parameter
Min.
Max.
1
Units
NPROGCYC
Flash Programming cycles per tRETENTION
10,000
Cycles
Flash functional programming cycles
100,000
tRETENTION
Data retention at 100°C junction temperature
10
Years
Data retention at 85°C junction temperature
20
1. Maximum Flash memory reads are limited to 7.5E13 cycles over the lifetime of the product.
Symbol
Parameter
Condition
Max.
Units
IDK
Input or I/O leakage Current
0 < VIN < VIH (MAX)
+/-1000
µA
1. Insensitive to sequence of VCC and VCCIO. However, assumes monotonic rise/fall rates for VCC and VCCIO.
2. 0 < VCC < VCC (MAX), 0 < VCCIO < VCCIO (MAX).
3. IDK is additive to IPU, IPD or IBH.


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