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FAN5070 数据表(PDF) 2 Page - Fairchild Semiconductor

部件名 FAN5070
功能描述  High Performance Programmable Synchronous DC-DC Controller
Download  14 Pages
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制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
标志 FAIRCHILD - Fairchild Semiconductor

FAN5070 数据表(HTML) 2 Page - Fairchild Semiconductor

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FAN5070
2
REV. 1.0.1 8/7/01
Pin Assignments
20
19
18
17
16
15
14
13
12
11
FAN5070
HIDRV
SW
GNDA
VID4
VID3
VID2
VID1
VID0
VREF
NC
VCCP
LODRV
GNDP
VCCA
VFB
DROOP
ILIM
PWRGD
SS/ENABLE
NC
1
2
3
4
5
6
7
8
9
10
Pin Definitions
Pin Number
Pin Name
Pin Function Description
1
HIDRV
High Side FET Driver. Connect this pin to the gate of an N-channel MOSFET. The
trace from this pin to the MOSFET gate should be <0.5".
2SW
High Side Driver Source and Low Side Driver Drain Switching Node. Together
with DROOP and ILIM pins allows FET sensing for VCC current.
3
GNDA
Analog Ground. Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
4-8
VID4-0
Voltage Identification Code Inputs. These open collector/TTL compatible inputs
will program the output voltage over the ranges specified in Table 1.
9
VREF
DAC Output for Test Only. Do not load externally.
10, 11
NC
NC. No Connect.
12
ENABLE/SS
Output Enable. A logic LOW on this pin will disable all outputs. An internal current
source allows for open collector control. This pin also doubles as soft start for all
outputs.
13
PWRGD
Power Good Flag. An open collector output that will be logic LOW if any output
voltage is not within ±14% of the nominal output voltage setpoint.
14
ILIM
VCC Current Feedback. Pin 11 is used in conjunction with pin 2 as the input for the
VCC current feedback control loop. Layout of these traces is critical to system
performance. See Application Information for details.
15
DROOP
Droop Set. Use this pin to set magnitude of active droop.
16
VFB
Vcc Voltage Feedback. Pin 13 is used as the input for the VCC voltage feedback
control loop. See Application Information for details regarding correct layout.
17
VCCA
Analog VCC. Connect to system 5V supply and decouple with a 0.1µF ceramic
capacitor.
18
GNDP
Power Ground. Return pin for high currents flowing in pin 17 (VCCP).
19
LODRV
VCC Low Side FET Driver. Connect this pin to the gate of an N-channel MOSFET
for synchronous operation. The trace from this pin to the MOSFET gate should be
<0.5".
20
VCCP
Power VCC. For all FET drivers. Connect to system 12V supply through a 33Ω, and
decouple with a 1µF ceramic capacitor.


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