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AD7656 数据表(PDF) 6 Page - Analog Devices |
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AD7656 数据表(HTML) 6 Page - Analog Devices |
6 / 32 page AD7656/AD7657/AD7658 Data Sheet Rev. D | Page 6 of 32 Parameter B Version1 Y Version1 Unit Test Conditions/Comments LOGIC OUTPUTS Output High Voltage (VOH) VDRIVE − 0.2 VDRIVE − 0.2 V min ISOURCE = 200 µA Output Low Voltage (VOL) 0.2 0.2 V max ISINK = 200 µA Floating-State Leakage Current ±1 ±1 µA max Floating-State Output Capacitance3 10 10 pF max Output Coding Twos complement CONVERSION RATE Conversion Time 3.1 3.1 µs max Track-and-Hold Acquisition Time2, 3 550 550 ns max Throughput Rate 250 250 kSPS Parallel interface mode only POWER REQUIREMENTS VDD 5/15 5/15 V nom min/max For 4 × VREF range, VDD = 10 V to 16.5 V VSS −5/−15 −5/−15 V nom min/max For 4 × VREF range, VDD = −10 V to −16.5 V AVCC 5 5 V nom DVCC 5 5 V nom VDRIVE 3/5 3/5 V nom min/max ITOTAL Digital I/PS = 0 V or VDRIVE Normal Mode (Static) 28 28 mA max AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V, (Includes IAVCC, IVDD, IVSS, IVDRIVE, IDVCC) VSS = −16.5 V Normal Mode (Operational) 26 26 mA max fSAMPLE = 250 kSPS, AVCC = DVCC = VDRIVE = 5.25 V, (Includes IAVCC, IVDD, IVSS, IVDRIVE, IDVCC) VDD = 16.5 V, VSS = −16.5 V ISS (Operational) 0.25 0.25 mA max VSS = −16.5 V, fSAMPLE = 250 kSPS IDD (Operational) 0.25 0.25 mA max VDD = 16.5 V, fSAMPLE = 250 kSPS Partial Power-Down Mode 7 7 mA max AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V, VSS = −16.5 V Full Power-Down Mode (STBY Pin) 80 80 µA max SCLK on or off, AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V, VSS = −16.5 V Power Dissipation AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V, VSS = −16.5 V Normal Mode (Static) 143 143 mW max Normal Mode (Operational) 140 140 mW max fSAMPLE = 250 kSPS Partial Power-Down Mode 35 35 mW max Full Power-Down Mode (STBY Pin) 100 100 µW max 1 Temperature ranges are as follows: B version is −40°C to +85°C and Y version is −40°C to +125°C. 2 See the Terminology section. 3 Sample tested during initial release to ensure compliance. |
类似零件编号 - AD7656 |
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类似说明 - AD7656 |
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