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74FR573 Datasheet(数据表) 4 Page - Fairchild Semiconductor

部件型号  74FR573
说明  Octal D-Type Latch with 3-STATE Outputs
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制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
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4
AC Electrical Characteristics
AC Operating Requirements
Extended AC Electrical Characteristics
Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase,
i.e. all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc.
Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi-
cation applies to any outputs switching HIGH-to-LOW, (tOSHL), LOW-to-HIGH, (tOSLH) or any combination of HIGH-to-LOW and/or LOW-to-HIGH, (tOST).
Specifications guaranteed with all outputs switching in phase.
Symbol
Parameter
TA = +25°CTA = 0°C to +70°C
Units
VCC = +5.0V
VCC = +5.0V
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
1.7
2.9
4.5
1.7
4.5
ns
tPHL
Dn to On
1.7
2.6
4.5
1.7
4.5
tPLH
Propagation Delay
2.6
6.0
8.5
2.6
8.5
ns
tPHL
LE to On
2.6
4.3
8.5
2.6
8.5
tPZH
Output Enable Time
2.8
4.0
7.4
2.8
7.4
ns
tPZL
2.8
5.0
7.4
2.8
7.4
tPHZ
Output Disable Time
2.2
4.0
6.3
2.2
6.3
ns
tPLZ
2.2
3.5
6.3
2.2
6.3
Symbol
Parameter
TA = +25°CTA = 0°C to +70°C
Units
VCC = +5.0V
VCC = +5.0V
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
Max
tS(H)
Setup Time, HIGH or LOW
1.0
−0.4
1.0
ns
tS(L)
Dn to LE
1.0
−0.7
1.0
tH(H)
Hold Time, HIGH or LOW
2.5
0.9
2.5
ns
tH(L)
Dn to LE
2.5
0.6
2.5
tW(H)
LE Pulse Width HIGH
5.0
2.7
5.0
ns
Symbol
Parameter
TA = 0°C to +70°CTA = 0°C to +70°C
Units
VCC = +5.0V
VCC = +5.0V
CL = 50 pF
CL = 250 pF
Eight Outputs Switching
(Note 4)
(Note 3)
Min
Max
Min
Max
tPLH
Propagation Delay
1.7
5.7
3.4
8.1
ns
tPHL
Dn to On
1.75.7
3.48.1
tPLH
Propagation Delay
2.6
9.8
4.5
12.3
ns
tPHL
LE to On
2.6
9.8
4.5
12.3
tPZH
Output Enable Time
2.8
9.6
ns
tPZL
2.8
9.6
tPHZ
Output Disable Time
2.2
7.3
ns
tPLZ
2.2
7.3
tOSHL
Pin-to-Pin Skew
1.3
ns
(Note 5)
for HL Transitions
tOSLH
Pin-to-Pin Skew
1.3
ns
(Note 5)
for LH Transitions
tOST
Pin-to-Pin Skew
3.0
ns
(Note 5)
for HL/LH Transitions




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