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74F161APC 数据表(PDF) 2 Page - Fairchild Semiconductor |
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74F161APC 数据表(HTML) 2 Page - Fairchild Semiconductor |
2 / 8 page www.fairchildsemi.com 2 Logic Symbols 74F161A IEEE/IEC 74F161A 74F163A IEEE/IEC 74F163A Unit Loading/Fan Out Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL CEP Count Enable Parallel Input 1.0/1.0 20 µA/−0.6 mA CET Count Enable Trickle Input 1.0/2.0 20 µA/−1.2 mA CP Clock Pulse Input (Active Rising Edge) 1.0/1.0 20 µA/−0.6 mA MR (74F161A) Asynchronous Master Reset Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA SR (74F163A) Synchronous Reset Input (Active LOW) 1.0/2.0 20 µA/−1.2 mA P0–P3 Parallel Data Inputs 1.0/1.0 20 µA/−0.6 mA PE Parallel Enable Input (Active LOW) 1.0/2.0 20 µA/−1.2 mA Q0–Q3 Flip-Flop Outputs 50/33.3 −1 mA/20 mA TC Terminal Count Output 50/33.3 −1 mA/20 mA |
类似零件编号 - 74F161APC |
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类似说明 - 74F161APC |
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