© 2001 Fairchild Semiconductor Corporation

DS500698

www.fairchildsemi.com

November 2001

Revised November 2001

74ALVC162827

Low Voltage 20-Bit Buffer/Line Driver

with 3.6V Tolerant Inputs and Outputs

and 26

Ω Series Resistors in the Outputs

General Description

The ALVC162827 contains twenty non-inverting buffers

with 3-STATE outputs to be employed as a memory and

address driver, clock driver, or bus oriented transmitter/

receiver. The device is byte controlled. Each byte has NOR

output enables for maximum control flexibility.

The 74ALVC162827 is designed for low voltage (1.65V to

ALVC162827 is also designed with 26

Ω resistors in the

outputs.

The 74ALVC162827 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

Features

s 3.6V tolerant inputs and outputs

s 26

Ω series resistors in outputs

s Power-off high impedance inputs and outputs

s Supports live insertion and withdrawal (Note 1)

s Uses patented noise/EMI reduction circuitry

s Latchup conforms to JEDEC JED78

s ESD performance:

Human body model

> 2000V

Machine model

> 200V

Note 1: To ensure the high-impedance state during power up or power

value of the resistor is determined by the current-sourcing capability of the

driver.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code.

Logic Symbol

Pin Descriptions

Order Number

Package Number

Package Description

74ALVC162827T

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin Names

Description

Output Enable Input (Active LOW)

Inputs

Outputs