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74ACTQ16646MTD 数据表(PDF) 6 Page - Fairchild Semiconductor |
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74ACTQ16646MTD 数据表(HTML) 6 Page - Fairchild Semiconductor |
6 / 9 page www.fairchildsemi.com 6 Extended AC Electrical Characteristics Note 11: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device. The specification applies to any outputs switching HIGH to LOW (tOSHL), LOW to HIGH (tOSLH), or any combination switching LOW to HIGH and/or HIGH to LOW (tOST). Note 12: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.). Note 13: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only. Note 14: 3-STATE delays are load dominated and have been excluded from the datasheet. Note 15: The Output Disable Time is dominated by the RC network (500 Ω, 250 pF) on the output and has been excluded from the datasheet. Capacitance TA = −40°C to +85°CTA = −40°C to +85°C VCC = Com VCC = Com CL = 50 pF CL = 250 pF Symbol Parameter 16 Outputs Switching Units (Note 12) (Note 13) Min Typ Max Min Max tPHL Propagation Delay 4.1 10.1 6.1 14.5 ns tPLH Clock to Bus 4.2 10.1 6.0 14.8 tPHL Propagation Delay 4.0 10.0 5.4 13.7 ns tPLH Bus to Bus 4.7 10.7 5.9 13.5 tPHL Propagation Delay 3.8 9.6 5.7 14.2 ns tPLH Select to Bus 4.3 10.9 6.1 15.5 (w/An or Bn HIGH or LOW) tPZL Enable Time 5.0 12.7 (Note 14) ns tPZH G to An/Bn 4.1 11.3 tPLZ Disable Time 3.2 8.3 (Note 15) ns tPHZ G to An/Bn 3.5 8.6 tPZL Enable Time 4.1 11.3 (Note 14) ns tPZH DIR to An/Bn 4.4 13.0 tPLZ Disable Time 2.9 9.5 (Note 15) ns tPHZ DIR to An/Bn 3.4 9.7 tOSHL Pin-to-Pin Skew 1.0 ns (Note 11) Clock to Bus tOSLH Pin-to-Pin Skew 1.0 ns (Note 11) Clock to Bus tOSHL Pin-to-Pin Skew 1.0 ns (Note 11) Bus to Bus tOSLH Pin-to-Pin Skew 1.0 ns (Note 11) Bus to Bus tOSHL Pin-to-Pin Skew (Note 11) Select to Bus 1.0 ns (w/An or Bn HIGH or LOW) tOSLH Pin-to-Pin Skew (Note 11) Select to Bus 1.2 ns (w/An or Bn HIGH or LOW) tOST Pin-to-Pin Skew 2.1 ns (Note 11) Clock to Bus tOST Pin-to-Pin Skew 1.0 ns (Note 11) Bus to Bus tOST Pin-to-Pin Skew 2.7 ns (Note 11) Select to Bus Symbol Parameter Typ Units Conditions CIN Input Capacitance 4.5 pF VCC = 5.0V CPD Power Dissipation Capacitance 95 pF VCC = 5.0V |
类似零件编号 - 74ACTQ16646MTD |
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类似说明 - 74ACTQ16646MTD |
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