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SMP04EP 数据表(PDF) 11 Page - Analog Devices |
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SMP04EP 数据表(HTML) 11 Page - Analog Devices |
11 / 15 page SMP04 –11– REV. D POSITIVE AND NEGATIVE PEAK DETECTOR WITH HOLD CONTROL (Figure 21) In this application the top amplifier (Amplifier A) is the positive peak detector and the bottom amplifier (Amplifier B) is the negative peak detector. Operation can be analyzed as follows: Assume that the S/H switch is closed. As a positive increasing voltage is applied to VIN, D2 turns on, and D1 turns off, closing the feedback loop around Amplifier A and the SMP04, causing the output to track the input. Conversely, in the negative peak detector circuit at the bottom, D4 turns off and D3 turns on, holding the last most negative input voltage on the SMP04. This voltage is buffered to the VO(NEG) output. As VIN falls in voltage the above conditions reverse, causing the most positive peak voltage to be held at VO(POS) output. This voltage will be held until the input has a more positive voltage than the previously held peak voltage, or a reset condition is applied. An optional HOLD control can be used by applying a logic HIGH to the PD/H inputs. This HOLD mode further reduces leakage current through the reverse-biased diodes (D2 and D4) during peak hold. VOUT NEGATIVE VSS DGND VSS VSS –5V +5V 1/2 OP221 1/2 OP221 –5V +5V VOUT POSITIVE AMPLIFIER A AMPLIFIER B R1 20k D1 1N914 D2 VDD 1/2 SMP04 R2 100 D S Q1 SD214 VIN ( 3.5V) RESET PD/H POSITIVE PD/H NEGATIVE SD214 R3 20k D3 1N914 R4 100 D S Q2 D4 G G Figure 21. Positive and Negative Peak Detector with Hold Control GAIN OF 10 SAMPLE-AND-HOLD (Figure 22) This application places the SMP04 in a feedback loop of an amplifier. Because the SMP04 has no sign inversion and the amplifier has very high open-loop gain, the gain of the circuit is set by the ratio of the sum of the source and feedback resistances +12V VSS 1/4 OP490 +12V VOUT 0V TO 10V 1/4 SMP04 1k VIN 0V TO 1.0V S/H 100k 1N914 8.66k 340 Figure 22. Gain of 10 Sample-and-Hold Amplifier to the source resistance. When a logic LOW is applied to the S/H control input, the loop is closed around the OP490, yielding a gain of 10 (in the example shown) amplifier. When the S/H control goes HIGH, the loop opens and the SMP04 holds the last sampled voltage. The loop remains open and the output is unaffected by the input until a logic LOW is reapplied to the S/H control. The pair of back-to-back diodes from the output of the op amp to the output of the track-and-hold pre- vents the op amp from saturating when the track-and-hold is in the hold mode and the loop is open. |
类似零件编号 - SMP04EP |
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类似说明 - SMP04EP |
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