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ADV7191KST 数据表(PDF) 10 Page - Analog Devices

部件名 ADV7191KST
功能描述  Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADV7191KST 数据表(HTML) 10 Page - Analog Devices

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ADV7190/ADV7191
–10–
REV. 0
PIN FUNCTION DESCRIPTIONS
Pin
Input/
No.
Mnemonic
Output
Function
1–16
P0–P15
I
8-Bit or 16-Bit 4:2:2 Multiplexed YCrCb Pixel Port. The LSB of the input data is set up on
Pin P0.
17, 25, 29,
VAA
P
Analog Power Supply (3.3 V to 5 V).
38, 43, 54,
63
18, 24, 26,
AGND
G
Analog Ground.
33, 39, 42,
55, 64
19
HSYNC
I/O
HSYNC (Modes 1, 2, and 3) Control Signal. This pin may be configured to be an output
(Master Mode) or an input (Slave Mode) and accept Sync Signals.
20
VSYNC
I/O
VSYNC Control Signal. This pin may be configured as an output (Master Mode) or as an
input (Slave Mode) and accept
VSYNC as a Control Signal.
21
BLANK
I/O
Video Blanking Control Signal. This signal is optional. For further information see Vertical
Blanking and Data Insertion
BLANK Input section.
22
ALSB
I
TTL Address Input. This signal sets up the LSB of the MPU address.
23
TTXREQ
O
Teletext Data Request Output Signal, used to control teletext data transfer.
27
CLKIN
I
TTL Clock Input. Requires a stable 27 MHz reference clock for standard operation. Alterna-
tively, a 24.5454 MHz (NTSC) or 29.5 MHz (PAL) can be used for square pixel operation.
28
CLKOUT
O
Clock Output Pin.
30
SCL
I
MPU Port Serial Interface Clock Input.
31
SDA
I/O
MPU Port Serial Data Input/Output.
32
SCRESET/
I
Multifunctional Input: Real-Time Control (RTC) Input, Timing Reset Input, Subcarrier Reset
RTC/TR
Input.
34
RSET2
I
A 1200
Ω resistor connected from this pin to GND is used to control full-scale amplitudes
of the Video Signals from DACs D, E, and F.
35
COMP 2
O
Compensation Pin for DACs D, E, and F. Connect a 0.1
µF Capacitor from COMP2 to VAA.
36
DAC F
O
S-Video C/V/RED Analog Output. This DAC is capable of providing 4.33 mA output.
37
DAC E
O
S-Video Y/U/BLUE Analog Output. This DAC is capable of providing 4.33 mA output.
40
DAC D
O
Composite/Y/GREEN Analog Output. This DAC is capable of providing 4.33 mA output.
41
DAC C
O
S-Video C/V/RED Analog Output. This DAC is capable of providing 4.33 mA output.
44
DAC B
O
S-Video Y/U/BLUE Analog Output. This DAC is capable of providing 4.33 mA output.
45
DAC A
O
Composite/Y/GREEN Analog Output. This DAC is capable of providing 4.33 mA output.
46
COMP 1
O
Compensation Pin for DACs A, B, and C. Connect a 0.1
µF Capacitor from COMP1 to VAA.
47
VREF
I/O
Voltage Reference Input for DACs or Voltage Reference Output (1.235 V). An external
VREF cannot be used in 4
× oversampling mode.
48
RSET1
I
A 1200
Ω resistor connected from this pin to GND is used to control full-scale amplitudes
of the Video Signals from DACs A, B, and C.
49
RESET
I
The input resets the on-chip timing generator and sets the ADV7190/ADV7191 into default
mode. See Appendix 8 for Default Register settings.
50
CSO_HSO
O
Dual function
CSO or HSO Output Sync Signal at TTL Level.
51
VSO/CLAMP
I/O
Multifunction Pin.
VSO Output Sync Signal at TTL level. CLAMP TTL Output Signals
can be used to drive external circuitry to enable clamping of all Video Signals.
52
PAL_NTSC
I
Input signal to select PAL or NTSC mode of operation, pin set to Logic 1 selects PAL.
53, 57–62
NC
No Connect.
56
TTX
I
Teletext Data Input Pin.


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