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ADMC401-PB 数据表(PDF) 2 Page - Analog Devices |
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ADMC401-PB 数据表(HTML) 2 Page - Analog Devices |
2 / 60 page RECOMMENDED OPERATING CONDITIONS B Grade Parameter Min Max Unit VDD Digital Supply Voltage 4.75 5.25 V AVDD Analog Supply Voltage 4.75 5.25 V TAMB Ambient Operating Temperature –40 +85 °C ELECTRICAL CHARACTERISTICS Parameter Test Conditions Min Max Unit VIH HI-Level Input Voltage 1, 2, 3 @ VDD = max 2.0 V VIL LO-Level Input Voltage 1, 2, 3 @ VDD = min 0.8 V VOH HI-Level Output Voltage 1, 3, 4, 5, 6 @ VDD = min, IOH = –1.0 mA 2.4 V @ VDD = min, IOH = –0.1 mA VDD – 0.3 V VOL LO-Level Output Voltage 1, 3, 4, 5, 6 @ VDD = min, IOL = 2.0 mA 0.4 V VOH HI-Level Output Voltage 5 @ VDD = min, IOH = –10.0 mA 2.4 V VOL LO-Level Output Voltage 5 @ VDD = min, IOL = 10.0 mA 1.2 V IIH HI-Level Input Current 7 @ VDD = max, VIN = VDD max 10 µA IIH HI-Level Input Current 8 @ VDD = max, VIN = VDD max 100 µA IIH HI-Level Input Current 9 @ VDD = max, VIN = VDD max 10 µA IIL LO-Level Input Current 7 @ VDD = max, VIN = 0 V 10 µA IIL LO-Level Input Current 8 @ VDD = max, VIN = 0 V 10 µA IIL LO-Level Input Current 9 @ VDD = max, VIN = 0 V 100 µA IOZH HI-Level Three-State Leakage Current 10 @ VDD = max, VIN = VDD max 10 µA IOZL LO-Level Three-State Leakage Current 10 @ VDD = max, VIN = 0 V 10 µA IDD Digital Supply Current (Idle) 11 @ VDD = max 40 mA IDD Digital Supply Current (Dynamic) 12 @ VDD = max 110 mA IDD Analog Supply Current @ AVDD = max 60 mA CI Input Pin Capacitance 13 VIN = 2.5 V, fIN = 1 MHz, 8 pF TAMB = +25 °C CO Output Pin Capacitance 13, 14 VIN = 2.5 V, fIN = 1 MHz, 8 pF TAMB = +25 °C NOTES 1Bidirectional pins: D0–D23, RFS0, RFS1, TFS0, TFS1, SCLK0 and SCLK1, PIO0–PIO11. 2Input only pins: PWMTRIP, PWMPOL, PWMSR, RESET, EIA, EIB, EIZ, EIS, ETU0, ETU1, DR1A, DR1B, DR0, CLKIN, CONVST, MMAP, BMODE, BR and PWD. 3Programmable I/O Pins (PIO0–PIO11). 4Output pins: PWMSYNC, AUX0, AUX1, CLKOUT, DT0, DT1, BG, BGH, PMS, DMS, BMS, RD, WR, PWDACK and A0–A13. 5Output pins: AH, AL, BH, BL, CH and CL. 6Although specified for TTL outputs, all ADMC401 outputs are CMOS-compatible and will drive to V DD–0.3 V and GND+0.3 V assuming no dc loads. 7Input only pins RESET, EIA, EIB, EIZ, EIS, ETU0, ETU1, DR1A, DR1B, DR0, CLKIN, CONVST, MMAP, BMODE, BR and PWD. 8Input pins with internal pull-down PIO0–PIO11 and PWMTRIP. 9Input pins with internal pull-up, PWMPOL and PWMSR. 10Three-statable pins: A0–A13, D0–D23, PMS, DMS, BMS, RD, WR, DT0, DT1, RFS0, RFS1, TFS0, TFS1, SCLK0, SCLK1. 11Idle refers execution of the IDLE instruction. Deasserted pins are driven to V DD or GND. Current reflects device operation with CLKOUT disabled. 12Current reflects device operating with no output loads. 13Guaranteed but not tested. 14Output Pin Capacitance is the capacitive load for any three-state output pin. Specifications subject to change without notice. (VDD = AVDD = 5 V 5%, GND = AGND = 0 V, TAMB = –40 C to +85 C, CLKIN = 13 MHz, unless otherwise noted) REV. B –2– ADMC401–SPECIFICATIONS |
类似零件编号 - ADMC401-PB |
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类似说明 - ADMC401-PB |
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