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AD75004KP 数据表(PDF) 3 Page - Analog Devices |
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AD75004KP 数据表(HTML) 3 Page - Analog Devices |
3 / 4 page AD75004 REV. A –3– TIMING CHARACTERISTICS1 (TA = +25 C, 12.0 V power supplies unless otherwise noted) Parameter Symbol Min Units Address Setup Time t1 30 ns Address Hold Time t2 10 ns Data Setup Time t3 10 ns Data Hold Time t4 45 ns Chip Select to Write Setup Time t5 0ns Write to Chip Select Hold Time t6 0ns Write Pulse Width t7 50 ns NOTES 1Timing measurement reference level is 1.5 V. Specifications subject to change without notice ADDRESS INPUTS (A0–A3) DATA INPUTS (D0–D7) t 1 t 2 t 3 t 4 t 5 t 6 t 7 WRITE (WR) CHIP SELECT (CS) ABSOLUTE MAXIMUM RATINGS* (TA = +25 °C unless otherwise noted) Min Max Units Conditions VDD to DGND –0.3 +18 V VSS to DGND –18 +0.3 V VDD to VSS –0.3 +26.4 V VREFIN to AGND –0.3 VDD V Digital Inputs to DGND –0.3 VDD V AGND to DGND –0.3 +0.3 V Short to AGND on Analog Outputs Indefinite sec Power Dissipation 1.0 W TA ≤ 75°C Specification Temperature Range 0 +70 °C Storage Temperature –65 +150 °C Lead Temperature +300 °C Soldering, 10 seconds *Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TRUTH TABLE Control and Address Lines CS WR A3 A2 A1 A0 Operation 1 X X X X X No operation X 1 X X X X No operation 0 0 0 0 A1* A0* 8 LSBs → one input latch 0 0 0 1 A1* A0* 4 MSBs → one input latch 0 0 1 0 A1* A0* Update one DAC latch 0 0 1 1 X X Update all 4 DAC latches NOTE *The A1 and A0 inputs specify the relevant channel. A1 A0 Channel 000 011 102 113 WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD75004 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model Temperature Range Package Option* AD75004KN 0 °C to +70°C N-24A AD75004KP 0 °C to +70°C P-28A *N = Plastic DIP; P = Plastic Leaded Chip Carrier. |
类似零件编号 - AD75004KP |
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类似说明 - AD75004KP |
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