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AD678AJ 数据表(PDF) 4 Page - Analog Devices |
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AD678AJ 数据表(HTML) 4 Page - Analog Devices |
4 / 14 page AD678 REV. C –4– TIMING SPECIFICATIONS Parameter Symbol Min Max Units SC Delay tSC 50 ns Conversion Time tC 3.0 4.4 µs Conversion Rate l tCR 5 µs Convert Pulsewidth tCP 97 ns Aperture Delay tAD 520 ns Status Delay tSD 0 400 ns Access Time 2, 3 tBA 10 100 ns 10 57 4 ns Float Delay 5 tFD 10 80 ns Output Delay tOD 0ns Format Setup tFS 47 ns OE Delay tOE 0ns Read Pulsewidth tRP 97 ns Conversion Delay tCD 150 ns EOCEN Delay tEO 0ns NOTES 1Includes acquisition time. 2Measured from the falling edge of OE/EOCEN (0.8 V) to the time at which the data lines/EOC cross 2.0 V or 0.8 V. See Figure 3. 3C OUT = 100 pF. 4C OUT = 50 pF. 5Measured from the rising edge of OE/EOCEN (2.0 V) to the time at which the output voltage changes by 0.5 V. See Figure 3; C OUT = 10 pF. Specifications subject to change without notice. (All grades, TMIN to TMAX, VCC = +12 V 5%, VEE = –12 V 5%, VDD = +5 V 10% unless otherwise noted) Figure 1. Conversion Timing Figure 2. EOC Timing Figure 3. Load Circuit for Bus Timing Specifications |
类似零件编号 - AD678AJ |
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类似说明 - AD678AJ |
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