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AD5325 数据表(PDF) 6 Page - Analog Devices

部件名 AD5325
功能描述  2.5 V to 5.5 V, 230uA, Parallel Interface Dual Voltage-Output 8-/10-/12-Bit DACs
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5325 数据表(HTML) 6 Page - Analog Devices

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REV. 0
AD5332/AD5333/AD5342/AD5343
–6–
AD5333 FUNCTIONAL BLOCK DIAGRAM
POWER-ON
RESET
DAC
REGISTER
DAC
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INTER-
FACE
LOGIC
DB9
DB0
CS
WR
A0
CLR
LDAC
.
.
.
VREFA
RESET
VREFB
BUF
GAIN
10-BIT
DAC
10-BIT
DAC
VOUTA
BUFFER
AD5333
VOUTB
BUFFER
VDD
POWER-DOWN
LOGIC
PD GND
AD5333 PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
GAIN
Gain Control Pin. This controls whether the output range from the DAC is 0–VREF or 0–2 VREF.
2
BUF
Buffer Control Pin. This pin controls whether the reference input to the DAC is buffered or unbuffered.
3VREFB
Reference input for DAC B.
4VREFA
Reference input for DAC A.
5VOUTA
Output of DAC A. Buffered output with rail-to-rail operation.
6VOUTB
Output of DAC B. Buffered output with rail-to-rail operation.
7
GND
Ground reference point for all circuitry on the part.
8
CS
Active Low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
9
WR
Active Low Write Input. This is used in conjunction with CS to write data to the parallel interface.
10
A0
Address pin for selecting between DAC A and DAC B.
11
CLR
Asynchronous active-low control input that clears all input registers and DAC registers to zeros.
12
LDAC
Active-low control input that updates the DAC registers with the contents of the input registers. This
allows all DAC outputs to be simultaneously updated.
13
PD
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
14
VDD
Power Supply Pin. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 F capacitor in parallel with a 0.1 F capacitor to GND.
15–24
DB0–DB9
10 Parallel Data Inputs. DB9 is the MSB of these 10 bits.
AD5333 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
AD5333
LDAC
A0
WR
CS
GAIN
VREFB
VOUTA
GND
PD
VDD
DB0
DB1
DB2
DB7
DB6
DB3
DB4
DB5
10-BIT
VOUTB
VREFA
BUF
CLR
DB8
DB9


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