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AD5315 数据表(PDF) 1 Page - Analog Devices |
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AD5315 数据表(HTML) 1 Page - Analog Devices |
1 / 20 page REV. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved. AD5305/AD5315/AD5325* 2.5 V to 5.5 V, 500 A, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs *Protected by U.S.Patent No. 5,969,657and 5,684,481. FEATURES AD5305: 4 Buffered 8-Bit DACs in 10-Lead MSOP A Version: 1 LSB INL, B Version: 0.625 LSB INL AD5315: 4 Buffered 10-Bit DACs in 10-Lead MSOP A Version: 4 LSB INL, B Version: 2.5 LSB INL AD5325: 4 Buffered 12-Bit DACs in 10-Lead MSOP A Version: 16 LSB INL, B Version: 10 LSB INL Low Power Operation: 500 A @ 3 V, 600 A @ 5 V 2-Wire (I2C® Compatible) Serial Interface 2.5 V to 5.5 V Power Supply Guaranteed Monotonic by Design over All Codes Power-Down to 80 nA @ 3 V, 200 nA @ 5 V Three Power-Down Modes Double-Buffered Input Logic Output Range: 0 V to VREF Power-On Reset to 0 V Simultaneous Update of Outputs ( LDAC Function) Software Clear Facility Data Readback Facility On-Chip Rail-to-Rail Output Buffer Amplifiers Temperature Range –40 C to +105 C APPLICATIONS Portable Battery-Powered Instruments Digital Gain and Offset Adjustment Programmable Voltage and Current Sources Programmable Attenuators Industrial Process Control FUNCTIONAL BLOCK DIAGRAM INPUT REGISTER VOUTA BUFFER DAC REGISTER STRING DAC A VDD REF IN GND AD5305/AD5315/AD5325 INPUT REGISTER VOUTB BUFFER DAC REGISTER INPUT REGISTER VOUTC BUFFER DAC REGISTER INPUT REGISTER VOUTD BUFFER DAC REGISTER POWER-ON RESET SDA SCL A0 INTERFACE LOGIC POWER-DOWN LOGIC LDAC STRING DAC B STRING DAC C STRING DAC D GENERAL DESCRIPTION The AD5305/AD5315/AD5325 are quad 8-, 10-, and 12-bit buffered voltage output DACs in a 10-lead MSOP that operate from a single 2.5 V to 5.5 V supply, consuming 500 µA at 3 V. Their on-chip output amplifiers allow rail-to-rail output swing with a slew rate of 0.7 V/ µs. A 2-wire serial interface, which operates at clock rates up to 400 kHz, is used. This interface is SMBus compatible at VDD < 3.6 V. Multiple devices can be placed on the same bus. The references for the four DACs are derived from one reference pin. The outputs of all DACs may be updated simultaneously using the software LDAC function. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write takes place to the device. There is also a software clear function that resets all input and DAC registers to 0 V. The parts contain a power-down feature that reduces the current consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V). The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is 3 mW at 5 V, 1.5 mW at 3 V, reducing to 1 µW in power-down mode. |
类似零件编号 - AD5315 |
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类似说明 - AD5315 |
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