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ACE24C02B 数据表(PDF) 7 Page - ACE Technology Co., LTD. |
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ACE24C02B 数据表(HTML) 7 Page - ACE Technology Co., LTD. |
7 / 20 page ACE24C02/04/08/16B Two-wire Serial EEPROM VER 1.3 7 Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see to Figure 1). Data changes during SCL high periods will indicate a start or stop condition as defined below. Start Condition: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see to Figure 2). Stop Condition: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode (see to Figure 2). Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. The happens during the ninth clock cycle. Standby Mode : The ACE24C02/04/08/16B features a low-power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the stop bit and the completion of any internal operations. Memory Reset : After an interruption in protocol power loss or system reset, any two-wire part can be protocol reset by following these steps: 1. Clock up to 9 cycles. 2. Look for SDA high in each cycle while SCL is high and then. 3. Create a start condition. Bus Timing Figure 1.Data Validity |
类似零件编号 - ACE24C02B |
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类似说明 - ACE24C02B |
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