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ADPLP01 数据表(PDF) 6 Page - Analog Devices

部件名 ADPLP01
功能描述  GSM Baseband Processing Chipset
Download  8 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADPLP01 数据表(HTML) 6 Page - Analog Devices

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AD20msp410
–6–
REV. 0
Digital Audio Interface (DAI)
As required by the GSM specifications, a digital audio interface
is provided to allow certain tests of the audio section during type
approval. This interface is provided by the serial bus between
the ASP and the PLP and two additional control signals from
the PLP. A fully functional “DAI Box” needed for the FTA
process may be obtained from Analog Devices upon request.
Digital Interface to the PLP for Data Services
A conventional H8 serial port combined with a proprietary
protocol is used to interface to an external Data Terminal
Adapter.
Digital Interface from the PLP to the EEPROM
The PLP provides separate pins to interface directly to an
external EEPROM via a serial port. This EEPROM is typically
used for storage of calibration or user variable parameters like
handset identifier (IMEI), language, keypad lock and radio
calibration parameters. A typical size of the EEPROM is 2K
× 8
bits, but this depends on the individual design of the handset.
GSM Baseband Processing Key Parts List
Table 1 lists the major hardware components necessary to
complete the GSM baseband processing subsystem. An example
Bill Of Material is available from Analog Devices. A full
reference design is available through Analog Devices/The
Technology Partnership.
Table I. List of Key Components
Quantity
Description
Specification
1
ASP
1
ADSP-2178
1
PLP
1
ADPLP01
1
BBC
1
AD7015
1
FLASH-PROM
2
256K
× 16, 150 ns
1
SRAM
128K
× 8, 120 ns
1
EEPROM
3
2K
× 8
1
Display Driver
Design Specific
NOTES
1These components comprise the AD20msp410 chipset.
2A size of 4 Mbits is recommended to allow storage of all GSM Layer
(1, 2, 3) programs as well as a typical user interface (MMI). Larger
memory can be used to support enhanced user interfaces.
3Can be omitted if parameters are stored in FLASH memory.
KEYPAD
KEYPAD
DATA
INTERFACE
ASP
BBC
CLOCK
POWER
SUBSYSTEM
13MHz
VCTCXO
DAI
INTERFACE
PLP
SPORT 0
SPORT 1
ADDRESS
DATA BUS
SYNTHESIZER
AND RADIO
CONTROL
DEMODULATOR
MODULATOR
IF
AMPLIFIER
RADIO
POWER
AMPLIFIER
CAR KIT
VOICEBAND
ANALOG I/O
AUX DAC 1
(AGC)
AUX DAC 3
(AGC)
BASEBAND
ANALOG I/O
AUX ADC
BASEBAND
SERIAL PORT
VOICEBAND
SERIAL PORT
AUX DAC 2
(AFC)
DAI CONTROL
ASP
INTERFACE
POWER
CONTROL
SYNTHESIZER
AND RADIO
CONTROL
DATA
INTERFACE
EEPROM
INTERFACE
KEYPAD
INTERFACE
BACKLIGHT
CONTROL
DISPLAY
CONTROL
PSRAM
CONTROL
DATA
ADDRESS
SERIAL PORT
SIM
INTERFACE
Figure 5. System Interfaces


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