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AD1380KD 数据表(PDF) 2 Page - Analog Devices

部件名 AD1380KD
功能描述  Low Cost 16-Bit Sampling ADC
Download  8 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD1380KD 数据表(HTML) 2 Page - Analog Devices

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REV. B
AD1380–SPECIFICATIONS
Model
AD1380JD
AD1380KD
Units
RESOLUTION
16
*
Bits
ANALOG INPUTS
Bipolar
±2.5, ±5, ±10
*
Volts
Unipolar
0 to +5, 0 to +10
*
Volts
DIGITAL INPUTS
1
Convert Command
TTL Compatible
*
Trailing Edge of Positive
50 ns (min) Pulse
Logic Loading
1
*
LSTTL Load
TRANSFER CHARACTERISTICS
2
(COMBINED ADC/SHA)
Gain Error
±0.1 max, ±0.05 typ3
*
% FSR4
Unipolar Offset Error
±0.05 max, ±0.02 typ3
*
% FSR
Bipolar Zero Error
±0.05 max, ±0.02 typ3
*
% FSR
Linearity Error
±0.006
±0.003
% FSR
Differential Linearity Error
±0.003
*
% FSR
Noise (10 V Unipolar)
85
*
µV rms
(20 V Bipolar)
115
*
µV rms
THROUGHPUT
Conversion Time
14 max
*
µs
Acquisition Time (20 V Step)
6 max
*
µs
SAMPLE & HOLD
Input Resistance
4
*
k
Small Signal Bandwidth
900
*
kHz
Aperture Time
50
*
ns
Aperture Jitter
100
*
ps rms
Droop Rate
50
*
µV/ms
TMIN to TMAX
1
*
mV/ms
Feedthrough
–80
*
dB
DRIFT (ADC & SHA)
5
Gain
±20 max
*
ppm/
°C
Unipolar Offset
±5 max (±2 typ)
*
ppm/
°C
Bipolar Zero
±5 max (±2 typ)
*
ppm/
°C
No Missing Codes (Guaranteed)
0 to +70 (13 Bits)
0 to +70 (14 Bits)
°C
DIGITAL OUTPUTS
TTL Compatible
All Codes Complementary
5
*
LSTTL Loads
Clock Frequency
1.1
*
MHz
POWER SUPPLY REQUIREMENTS
Analog Supplies
±15 ±0.5
*
Volts
Digital Supply
+5
±0.25
*
Volts
+15 V Supply Current
25
*
mA
–15 V Supply Current
30
*
mA
+5 V Supply Current
15
*
mA
Power Dissipation
900
*
mW
TEMPERATURE RANGE
Specified
0 to +70
*
°C
Operating
–25 to +85
*
°C
NOTES
1Logic “0” = 0.8 V, max. Logic “1” = 2.0 V, min for inputs. For digital outputs Logic “0” = 0.4 V max. Logic “1” = 2.4 V min.
2Tested on
±10 V and 0 V to +10 V ranges.
3Adjustable to zero.
4Full-scale range.
5Guaranteed but not 100% production tested.
*Specifications same as AD1380JD.
Specifications subject to change without notice.
(typical @ TA = +25 C, VS = +15 V, +5 V combined sample-and-hold A/D converter
unless otherwise noted)


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