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LCX016AL 数据表(PDF) 5 Page - Sony Corporation |
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LCX016AL 数据表(HTML) 5 Page - Sony Corporation |
5 / 24 page – 5 – LCX016AL Input Signals 1. Input signal voltage conditions (VSS = 0V) Item H shift register input voltage HST, HCK1, HCK2, RGT (Low) (High) (Low) (High) VHIL VHIH VVIL VVIH VVC Vsig Vcom Vpsig –0.5 4.5 –0.5 4.5 6.8 VVC – 4.5 VVC – 0.5 VVC ± 4.3 0.0 5.0 0.0 5.0 7.0 7.0 VVC – 0.4 VVC ± 4.5 0.4 5.5 0.4 5.5 7.2 VVC + 4.5 VVC – 0.3 VVC ± 4.7 V V V V V V V V V shift register input voltage MODE1, MODE2, MODE3, BLK, VST, VCK, PCG, ENB, DWN Video signal center voltage Video signal input range∗1 Common voltage of panel∗2 Uniformity improvement signal input voltage (PSIG)∗3 Symbol Min. Typ. Max. Unit ∗1 Input video signal shall be symmetrical to VVC. ∗2 The typical value of the common pad voltage may lower its suitable voltage according to the set construction to use. In this case, use the voltage of which has maximum contrast as typical value. When the typical value is lowered, the maximum and minimum values may lower. ∗3 Input a uniformity improvement signal PSIG in the same polarity with video signals SIG1 to 6 and which is symmetrical to VVC. Also, the rising and falling of PSIG are synchronized with the rising of PCG pulse, and the rise time trPSIG and fall time tfPSIG are suppressed within 800ns (as shown in a diagram below). Level Conversion Circuit The LCX016AL has a built-in level conversion circuit in the clock input unit on the panel. The input signal level increases to HVDD or VVDD. The VCC of external ICs are applicable to 5 ± 0.5V. trPSIG tfPSIG VVC PSIG PCG 90% 10% Input waveform of uniformity improvement signal PSIG |
类似零件编号 - LCX016AL |
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类似说明 - LCX016AL |
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