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AD9915BCPZ-REEL7 数据表(PDF) 4 Page - Analog Devices

部件名 AD9915BCPZ-REEL7
功能描述  2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC
Download  48 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9915BCPZ-REEL7 数据表(HTML) 4 Page - Analog Devices

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AD9915
Data Sheet
Rev. A | Page 4 of 48
SPECIFICATIONS
DC SPECIFICATIONS
AVDD (1.8V) and DVDD (1.8V) = 1.8 V ± 5%, AVDD (3.3V) and DVDD_I/O (3.3V) = 3.3 V ± 5%, TA = 25°C, RSET = 3.3 kΩ,
IOUT = 20 mA, external reference clock frequency = 2.5 GHz with reference clock (REF CLK) multiplier bypassed, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SUPPLY VOLTAGE
DVDD_I/O
3.135
3.30
3.465
V
Pin 16, Pin 83
DVDD
1.71
1.80
1.89
V
Pin 6, Pin 23, Pin 73
AVDD (3.3V)
3.135
3.30
3.465
V
Pin 34, Pin 36, Pin 39, Pin 40, Pin 43, Pin 47, Pin 50, Pin 52,
Pin 53, Pin 60
AVDD (1.8V)
1.71
1.80
1.89
V
Pin 32, Pin 56, Pin 57
SUPPLY CURRENT
See also the total power dissipation specifications
IDVDD_I/O
20
mA
Pin 16, Pin 83
IDVDD
270
mA
Pin 6, Pin 23, Pin 73
IAVDD(3.3V)
640
mA
Pin 34, Pin 36, Pin 39, Pin 40, Pin 43, Pin 47, Pin 50, Pin 52,
Pin 53, Pin 60
IAVDD(1.8V)
148
mA
Pin 32, Pin 56, Pin 57
TOTAL POWER DISSIPATION
Base DDS Power, PLL Disabled
2138
2797
mW
2.5 GHz, single-tone mode, modules disabled, linear
sweep disabled, amplitude scaler disabled
Base DDS Power, PLL Enabled
2237
2890
mW
2.5 GHz, single-tone mode, modules disabled, linear
sweep disabled, amplitude scaler disabled
Linear Sweep Additional Power
28
mW
Modulus Additional Power
20
mW
Amplitude Scaler Additional
Power
138
mW
Manual or automatic
Full Power-Down Mode
400
616
mW
Using either the power-down and enable register or the
EXT_PWR_DWN pin
CMOS LOGIC INPUTS
Input High Voltage (VIH)
2.0
DVDD_I/O
V
Input Low Voltage (VIL)
0.8
V
Input Current (IINH, IINL)
±60
±200
μA
At VIN = 0 V and VIN = DVDD_I/O
Maximum Input Capacitance (CIN)
3
pF
CMOS LOGIC OUTPUTS
Output High Voltage (VOH)
2.7
DVDD_I/O
V
IOH = 1 mA
Output High Voltage (VOL)
0.4
V
IOL = 1 mA
REF CLK INPUT CHARACTERISTICS
REF CLK inputs should always be ac-coupled (both single-
ended and differential)
REF CLK Multiplier Bypassed
Input Capacitance
1
pF
Single-ended, each pin
Input Resistance
1.4
Differential
Internally Generated DC Bias
Voltage
2
V
Differential Input Voltage
0.8
1.5
V p-p
REF CLK Multiplier Enabled
Input Capacitance
1
pF
Single-ended, each pin
Input Resistance
1.4
Differential
Internally Generated DC Bias
Voltage
2
V
Differential Input Voltage
0.8
1.5
V p-p


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