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74LCX240MTC 数据表(PDF) 1 Page - Fairchild Semiconductor |
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74LCX240MTC 数据表(HTML) 1 Page - Fairchild Semiconductor |
1 / 12 page ©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX240 Rev. 1.6.0 January 2008 74LCX240 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs Features ■ 5V tolerant inputs and outputs ■ 2.3V–3.6V VCC specifications provided ■ 6.5ns tPD max. (VCC = 3.3V), 10µA ICC max. ■ Power-down high impedance inputs and outputs ■ Supports live insertion/withdrawal(1) ■ ±24mA output drive (VCC = 3.0V) ■ ■ Latch-up performance exceeds 500mA ■ ESD performance: – Human body model > 2000V – Machine model > 200V Note: 1. To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. General Description The LCX240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver. The device is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCX240 is fabricated with an advanced CMOS tech- nology to achieve high speed operation while maintain- ing CMOS low power dissipation. Ordering Information Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Order Number Package Number Package Description 74LCX240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LCX240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX240MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74LCX240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Implements proprietary noise/EMI reduction circuitry |
类似零件编号 - 74LCX240MTC_08 |
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类似说明 - 74LCX240MTC_08 |
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