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FIN424C 数据表(PDF) 4 Page - Fairchild Semiconductor |
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FIN424C 数据表(HTML) 4 Page - Fairchild Semiconductor |
4 / 10 page © 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FIN424C / FIN425C • Rev. 1.0.0 4 Table 1. Reset and Standby Modes / States /RES FIN424C FIN425C /STBY FIN424C Mode Pins FIN424C Parallel Input State FIN425C Parallel Output State 0 X Reset Mode DP[19:0] Disabled LOW STRB / WCLK Disabled HIGH 1 0 Standby Mode DP[19:0] Disabled LAST STATE STRB / WCLK Disabled HIGH 1 1 Operating Mode DP[19:0] Enabled ENABLED STRB / WCLK Enabled ENABLED Application Diagram STRB DP[15:0] DP[16] DP[17] DP[18] DP[19] /RES /STBY Test CKS+ CKS- DS+ DS- VDDP VDDS/A /WE DP[15:0] A0 CS1 CS2 Reset /STBY Baseband Processor GND CKS+ CKS- DS+ DS- GND Main Display 16-Bit µController /WE A0 DATA[15:0] RESET /CS VDDP VDDS/A FIN424C FIN425C 1.8V 2.8V WCLK DP[15:0] DP[16] DP[17] DP[18] DP[19] Slew Test /RES Sub-Display 8-Bit µController /WE A0 DATA[7:0] RESET /CS 2.8V 2.8V - - - - - /WE A0 DATA[15:0] RESET /CS - 8 Figure 4. Dual-Display, 16-Bit, µController Interface |
类似零件编号 - FIN424C |
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类似说明 - FIN424C |
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