TS7003ITD833T datasheet(4/14 Pages) TOUCHSTONE

部件名	TS7003ITD833T

功能描述	A 300ksps, Single-supply, 12-Bit Serial-output ADC

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制造商	TOUCHSTONE [Touchstone Semiconductor Inc]

网页	http://www.touchstonesemi.com

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4 / 14 page

TS7003

Page 4

TS7003DS r1p0

RTFDS

TIMING SPECIFICATIONS

VDD = +2.7V to +3.6V, TA = -40ºC to +85ºC, unless otherwise noted.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCLK Period

tCP

208

ns

SCLK Pulse-Width High

tCH

83

ns

SCLK Pulse-Width Low

tCL

83

ns

CS Fall to SCLK Rise Setup

tCSS

45

ns

SCLK Rise to

CS Rise Hold

tCSH

0

ns

SCLK Rise to

CS Fall Ignore

tCSO

45

ns

CS Rise to SCLK Rise Ignore

tCS1

45

ns

SCLK Rise to DOUT Hold

tDOH

CLOAD = 20pF

13

ns

SCLK Rise to DOUT Valid

tDOV

CLOAD = 20pF

100

ns

CS Rise to DOUT Disable

tDOD

CLOAD = 20pF; Refer to Figure 2

13

85

ns

CS Fall to DOUT Enable

tDOE

CLOAD = 20pF; Refer to Figure 1

85

ns

CS Pulse-Width High

tCSW

100

ns

Note 1: Tested at VDD = VDD(MIN).

Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has been

calibrated.

Note 3: Internal reference, offset, and reference errors nulled.

Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.

Note 5: External load should not change during conversion for specified accuracy. Guaranteed specification limit of 2mV/mA because of

production test limitations.

Note 6: Electrical characteristics are guaranteed from VDD(MIN) to VDD(MAX). For operations beyond this range, see Typical Operating

Characteristics.

Note 7: TS7003 tested with 20pF on DOUT and fSCLK = 4.8MHz, 0 to 3V. DOUT = full scale.

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Touchstone Semiconducto...	TS7003ITD833T	170Kb / 2P	A 300ksps, Single-supply, 12-Bit Serial-output ADC
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类似说明 - TS7003ITD833T

制造商	部件名	数据表	功能描述
Touchstone Semiconducto...	TS7003	170Kb / 2P	A 300ksps, Single-supply, 12-Bit Serial-output ADC
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