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SI51210-AXXXFM 数据表(PDF) 1 Page - Silicon Laboratories |
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SI51210-AXXXFM 数据表(HTML) 1 Page - Silicon Laboratories |
1 / 12 page Preliminary Rev. 0.7 1/12 Copyright © 2012 by Silicon Laboratories Si51210 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si51210 TWO O UTPUTS F ACTORY P ROGRAMMABLE C LOCK G ENERATOR Features Applications Description The factory programmable Si51210 is industry’s lowest power, smallest footprint and frequency flexible programmable clock generator targeting low power, low cost and high volume consumer and embedded applications. The device operates from a single crystal or an external clock source and generates 1 to 2 outputs up to 200 MHz. They are factory programmed to provide customized output frequencies, control inputs and ac parameter tuning like output drive strength that are optimized for customer board condition and application requirements. Functional Block Diagram Generates up to 2 CMOS clock outputs from 3 to 200 MHz Accepts crystal or reference clock input 3 to 166 MHz reference clock input 8 to 48 MHz crystal input Programmable FSEL, SSEL, SSON, PD, and OE input functions Low power dissipation 2.5 to 3.3 V voltage supply range 0.25% to 1.0% spread spectrum (center spread) Low cycle-cycle jitter Programmable output rise and fall times Ultra small 6-pin TDFN package (1.2 mm x 1.4 mm) Crystal/XO replacement EMI reduction Portable devices Digital still camera IP phone Smart meter 3 2 1 6 4 5 To Pin 4 and Pin 5 To Core Programmable Configuration Register PLL with Modulation Control Buffers, Dividers, and Switch Matrix SSCLK1/ REFCLK/ 0E2/FSEL/ SSEL/SS0N SSCLK2/ REFCLK_D 0E1/FSEL/ SSEL/SS0N/PD XIN/ CLKIN XOUT VDD VSS V-REG Patents pending Ordering Information: See page 9. Pin Assignments 6 5 4 1 2 3 VSS SSCLK2/REFCLK_D FSEL/SSEL/SSON/ PD/OE1 SSCLK1/REFCLK FSEL/SSEL/SSON/ OE2 VDD XOUT XIN/CLKIN Si51210 |
类似零件编号 - SI51210-AXXXFM |
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类似说明 - SI51210-AXXXFM |
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