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BU21023GUL 数据表(PDF) 9 Page - Rohm |
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BU21023GUL 数据表(HTML) 9 Page - Rohm |
9 / 18 page Technical Note 9/17 www.rohm.com 2011.08 - Rev.A © 2011 ROHM Co., Ltd. All rights reserved. BU21023GUL,BU21023MUV,BU21024FV-M ● Pin Description 【 BU21023GUL】 No. Pin name I/O Function Fig. D1 YN I/O Panel interface E C1 XN I/O Panel interface E C2 YP I/O Panel interface E B1 XP I/O Panel interface E A1 T4 I/O Test pin E A2 PVDD O Regulator output (for supply panel voltage) - B3 AVDD O Regulator output (for supply analog block) - A3 DVDD I/O Regulator output (for supply digital block) or supply digital voltage (DVDD_EXT="H") - B4 DVDD_EXT I Digital voltage enable (H=Hi-z , L=DVDD Enable) E A4 VDD - Supply voltage - A5 VSS - Ground - C3 RSTB I H/W reset E B5 CLK_EXT I Supply external clock for debug A C4 T1 I Test pin A C5 T2 I Test pin A D4 T3 I Test pin A D5 IFSEL I Intereface select pin (L=SPI, H=2wire serial) A D3 SO O SPI Serila data output 2wire - F E5 INT O Interrupt output C D2 SEL_CSB I SPI Chip select 2wire Slave address select C E4 SDA_SI I/O SPI Serial data input 2wire Serial data in-out C E3 SCL_SCK I SPI Serial clock input 2wire Serial clock input C E2 EDA I/O EEPROM SDA C E1 ECL O EEPROM SCL C 1. Please use 1.0uF capacitors between AVDD and DVDD to GND, and leave PVDD terminal open. 2. If DVDD_EXT=”H “, the DVDD pin can be connected to an external 1.8V power source. 3. Please pull up the ECL, EDA, and INT pins using 10k ohm resistors as shown in the application diagram at the end of this document. ECL and EDA pins may be directly connected to GND if an external EEPROM is not being used. Please connect a 0.1uF capacitor between T4 and GND. T1, T2 & T3 pins should be connected to GND. 4. When using the 2 wire serial interface, please pull up the SCL_SCK, SDA_SI pins via 10k ohms and leave SO unconnected. 5. Please note that the values of resistors and capacitors mentioned here are only recommended values. 6. RSTB should be held low until supply voltage VDD has ramped up and has reached a stable level. 7. The polarity of INT pin is programmable via register 0x30 8. Connect CLK_EXT to GND for normal use TOP VIEW (BALL SIDE DOWN) BOTTOM VIEW (BALL SIDE UP) 123 4 5 A B C D E T4 PVDD DVDD VDD VSS XP AVDD DVDD_EXT CLK_EXT XN YP RSTB T1 T2 YN SEL_CSB SO T3 IFSEL ECL EDA SCL_SCK SDA_SI INT 1 2345 E D C B A T4 PVDD DVDD VDD VSS XP AVDD DVDD_EXT CLK_EXT XN YP RSTB T1 T2 YN SEL_CSB SO T3 IFSEL ECL EDA SCL_SCK SDA_SI INT |
类似零件编号 - BU21023GUL |
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类似说明 - BU21023GUL |
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