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SN74LVT8996-EP 数据表(PDF) 3 Page - Texas Instruments |
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SN74LVT8996-EP 数据表(HTML) 3 Page - Texas Instruments |
3 / 42 page SN74LVT8996EP 3.3V 10BIT ADDRESSABLE SCAN PORT MULTIDROPADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVER SCBS764 − SEPTEMBER 2003 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) Alternatively, primary-to-secondary connection can be selected by assertion of a low level at the bypass (BYP) input. This operation is asynchronous to PTCK and is independent of PTRST and/or power-up reset. This bypassing feature is especially useful in the board-test environment, since it allows the board-level automated test equipment (ATE) to treat the ASP as a simple transceiver. When the BYP input is high, the ASP is free to respond to shadow protocols. Otherwise, when BYP is low, shadow protocols are ignored. Whether the connected status is achieved by use of shadow protocol or by use of BYP, this status is indicated by a low level at the connect (CON) output. Likewise, when the secondary TAP is disconnected from the primary TAP, the CON output is high. FUNCTION TABLE INPUTS SHADOW-PROTOCOL † OUTPUTS PRIMARY-TO-SECONDARY BYP PTRST SHADOW-PROTOCOL RESULT† STRST STCK STMS STDO PTDO CON PRIMARY-TO-SECONDARY CONNECT STATUS L L — L PTCK H‡ PTDI STDI L BYP/TRST‡ L H— H PTCK PTMS PTDI STDI L BYP H L— L PTCK H Z Z H TRST H H RESET H PTCK H Z Z H RESET H H MATCH H PTCK PTMS PTDI STDI L ON H H NO MATCH H PTCK STMS0§ Z Z H OFF H H HARD ERROR¶ H PTCK STMS0§ Z Z H OFF H H DISCONNECT H PTCK STMS0§ Z Z H OFF H H TEST SYNCHRONIZATION H PTCK PTMS PTDI Z L MULTICAST † Shadow protocols are received serially via PTCK and PTDI and acknowledged serially via PTCK and PTDO under certain conditions in which PTMS is static low or static high (see shadow protocol). The result shown here follows any required acknowledgment. ‡ In normal operation of IEEE Std 1149.1-compliant architectures, it is recommended that TMS be high prior to release of TRST. The BYP/TRST connect status ensures that this condition is met at STMS regardless of the applied PTMS. Also, it is recommended that STMS be kept high for a minimum duration of 5 PTCK cycles following assertion of PTRST, either by maintaining PTRST low or by setting PTMS high. This ensures that ICs both with and without TRST inputs are moved to their Test-Logic-Reset TAP states. It is expected that in normal application, this condition occurs only when BYP is fixed at the low state. In such case, upon release of PTRST, the ASP immediately resumes the BYP connect status. § STMS level before indicated steady-state conditions were established ¶ The shadow protocol is well defined. Some variations in the protocol are tolerated (see protocol errors). Those that are not tolerated produce protocol result HARD ERROR and cause disconnect as indicated. |
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