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74AVC16269DGGRE4 数据表(PDF) 1 Page - Texas Instruments |
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74AVC16269DGGRE4 数据表(HTML) 1 Page - Texas Instruments |
1 / 17 page www.ti.com FEATURES DESCRIPTION 136 -128 -144 -160 0.4 0.8 1.2 1.6 2.0 2.4 2.8 170 153 119 102 85 68 51 34 17 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 TA = 25°C Process = Nominal IOL - Output Current - mA VCC = 3.3 V VCC = 2.5 V VCC = 1.8 V TA = 25°C Process = Nominal IOH - Output Current - mA VCC = 3.3 V VCC = 2.5 V VCC = 1.8 V -80 -96 -112 -32 -48 -64 0 -16 SN74AVC16269 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES152G – DECEMBER 1998 – REVISED MAY 2005 • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications • Member of the Texas Instruments Widebus™ Family • Ioff Supports Partial-Power-Down Mode Operation • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • DOC™ (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, • Package Options Include Plastic Thin Shrink Resulting in Noise Reduction Without Speed Small-Outline (DGG) and Thin Very Degradation Small-Outline (DGV) Packages • Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA at 2.5-V VCC A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009. Figure 1. Output Voltage vs Output Current This 12-bit to 24-bit registered bus exchanger is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC operation. The SN74AVC16269 is used in applications in which two separate ports must be multiplexed onto, or demultiplexed from, a single port. The device is particularly suitable as an interface between synchronous DRAMs and high-speed microprocessors. Data is stored in the internal B-port registers on the low-to-high transition of the clock (CLK) input when the appropriate clock-enable (CLKENA) inputs are low. Proper control of these inputs allows two sequential 12-bit words to be presented as a 24-bit word on the B port. For data transfer in the B-to-A direction, a single storage register is provided. The select (SEL) line selects 1B or 2B data for the A outputs. The register on the A output permits the fastest possible data transfer, thus extending the period during which the data is valid on the bus. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, EPIC, DOC are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1998–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
类似零件编号 - 74AVC16269DGGRE4 |
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类似说明 - 74AVC16269DGGRE4 |
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