SN74AUP2G14 datasheet(1/23 Pages) TI1

部件名	SN74AUP2G14

功能描述	LOW-POWER DUAL SCHMITT-TRIGGER INVERTER

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制造商	TI1 [Texas Instruments]

网页	http://www.ti.com

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4

2

3

2A

GND

1A

2Y

1

DCKPACKAGE

(TOP VIEW)

1Y

6

V

CC

5

2A

2Y

3

4

GND

2

5

1A

6

1

V

CC

1Y

DSFPACKAGE

(TOP VIEW)

YFP PACKAGE

(TOP VIEW)

2A

1Y

GND

5

4

2

3

1A

2Y

1

DRY PACKAGE

(TOP VIEW)

6

V

CC

2A

1A

2Y

1Y

GND

3

6

2

1

4

5

V

CC

A1

B1

C1

A2

B2

C2

(A)

Single,dual,andtriplegates

Static-PowerConsumption

(µA)

AUP

3.3-V

Logic

(A)

0%

20%

40%

60%

80%

100%

Dynamic-PowerConsumption

(pF)

AUP

3.3-V

Logic

(A)

0%

20%

40%

60%

80%

100%

SwitchingCharacteristics

at25MHz

(A)

−0.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

0

5

10

15

20

25

30

35

40

45

Time(ns)

Output

Input

(A) SN74AUP2GxxdataatC =15pF.

L

SN74AUP2G14

www.ti.com

SCES749C – SEPTEMBER 2009 – REVISED FEBRUARY 2012

LOW-POWER DUAL SCHMITT-TRIGGER INVERTER

Check for Samples: SN74AUP2G14

1

FEATURES

2

•

Available in the Texas Instruments NanoStar™

•

Optimized for 3.3-V Operation

Package

•

3.6-V I/O Tolerant to Support Mixed-Mode

•

Low Static-Power Consumption

Signal Operation

(ICC = 0.9 μA Maximum)

•

tpd = 4.3 ns Maximum at 3.3 V

•

Low Dynamic-Power Consumption

•

Suitable for Point-to-Point Applications

(Cpd = 4.3 pF Typical at 3.3 V)

•

Latch-Up Performance Exceeds 100 mA Per

•

Low Input Capacitance (Ci = 1.5 pF Typical)

JESD 78, Class II

•

Low Noise – Overshoot and Undershoot

•

ESD Performance Tested Per JESD 22

<10% of VCC

–

2000-V Human-Body Model

•

Ioff Supports Partial-Power-Down Mode

(A114-B, Class II)

Operation

–

1000-V Charged-Device Model (C101)

•

Wide Operating VCC Range of 0.8 V to 3.6 V

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable

applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range

of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal

integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

Figure 1. AUP – The Lowest-Power Family

Figure 2. Excellent Signal Integrity

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

NanoStar is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

类似零件编号 - SN74AUP2G14

制造商	部件名	数据表	功能描述
Texas Instruments	SN74AUP2G125	869Kb / 21P	[Old version datasheet] LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
	SN74AUP2G125DCUR	869Kb / 21P	[Old version datasheet] LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
	SN74AUP2G125DQER	869Kb / 21P	[Old version datasheet] LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
	SN74AUP2G125RSER	869Kb / 21P	[Old version datasheet] LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
	SN74AUP2G125YFPR	869Kb / 21P	[Old version datasheet] LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS

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类似说明 - SN74AUP2G14

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