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DRV8823 Datasheet(数据表) 3 Page - Texas Instruments

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部件型号  DRV8823
说明  4-BRIDGE SERIAL INTERFACE MOTOR DRIVER
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
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DRV8823 Datasheet(HTML) 3 Page - Texas Instruments

 
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Logic inputs
To
logic
ESD
Internal
pulldown
Hysteresis
DRV8823
www.ti.com
SLVS913D – JANUARY 2009 – REVISED JANUARY 2010
TERMINAL FUNCTIONS
NAME
NO.
I/O(1)
DESCRIPTION
EXTERNAL COMPONENTS OR CONNECTIONS
POWER AND GROUND
VM
1, 2,
Connect all VM pins together to motor supply voltage.
-
Motor supply voltage (multiple pins)
(4 pins)
23, 24
Bypass to GND with several 0.1-mF, 35-V ceramic capacitors.
V3P3
16
-
3.3 V regulator output
Bypass to GND with 0.47-mF, 6.3-V ceramic capacitor.
GND
10 - 15,
-
Power ground (multiple pins)
Connect all PGND pins to GND and solder to copper heatsink areas.
34 - 39
CP1
7
IO
Charge pump flying capacitor
Connect a 0.01-mF capacitor between CP1 and CP2
CP2
8
IO
VCP
9
IO
Charge pump storage capacitor
Connect a 0.1-mF, 16 V ceramic capacitor to VM
MOTOR DRIVERS
Bridge A & B current set reference
ABVREF
17
I
Sets current trip threshold.
voltage
AOUT1
5
O
Bridge A output 1
Connect to first coil of bipolar stepper motor 1, or DC motor winding.
AOUT2
3
O
Bridge A output 2
ISENA
4
-
Bridge A current sense
Connect to current sense resistor for bridge A.
BOUT1
48
O
Bridge B output 1
Connect to second coil of bipolar stepper motor 1, or DC motor
winding.
BOUT2
46
O
Bridge B output 2
ISENB
47
-
Bridge B current sense
Connect to current sense resistor for bridge B.
Bridge C & D current set reference
CDVREF
18
I
Sets current trip threshold.
voltage
COUT1
27
O
Bridge C output 1
Connect to first coil of bipolar stepper motor 2, or DC motor winding.
COUT2
25
O
Bridge C output 2
ISENC
26
-
Bridge C current sense
Connect to current sense resistor for bridge C.
DOUT1
22
O
Bridge D output 1
Connect to second coil of bipolar stepper motor 2, or DC motor
winding.
DOUT2
20
O
Bridge D output 2
ISEND
22
-
Bridge D current sense
Connect to current sense resistor for bridge D.
SERIAL INTERFACE
SDATA
31
I
Serial data input
Data is clocked in on rising edge of SCLK.
SCLK
33
I
Serial input clock
Logic high enables serial data to be clocked in.
SCS
45
I
Serial chip select
Logic high latches serial data.
SSTB
30
I
Serial data strobe
Active low resets serial interface and disables outputs.
RESETn
43
I
Reset input
Active low input disables outputs and charge pump.
SLEEPn
42
I
Sleep input
TEST PINS
19, 28,
TEST
I
Test inputs
Do not connect these pins - used for factory test only.
29, 32
(1)
Directions: I = input, O = output, OZ = 3-state output, OD = open-drain output, IO = input/output, PU = internal pullup
Figure 1. Logic Inputs
Copyright © 2009–2010, Texas Instruments Incorporated
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