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DAC34SH84 数据表(PDF) 9 Page - Texas Instruments |
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DAC34SH84 数据表(HTML) 9 Page - Texas Instruments |
9 / 77 page DAC34SH84 www.ti.com SLAS808B – FEBRUARY 2012 – REVISED JULY 2012 ELECTRICAL CHARACTERISTICS – DC SPECIFICATIONS (continued) over recommended operating free-air temperature range, nominal supplies, IOUTFS = 20 mA (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT I(AVDD) Analog supply current(4) 115 mA Mode 2 I(DIGVDD) Digital supply current 770 mA fDAC = 1.47456 GSPS, 2× interpolation, I(DACVDD) DAC supply current 40 mA mixer on, QMC on, invsinc on, I(CLKVDD) Clock supply current 95 mA PLL disabled, 20-mA FS output, IF = 7.3 MHz P Power dissipation 1562 mW I(AVDD) Analog supply current(4) 115 mA Mode 3 I(DIGVDD) Digital supply current 470 mA fDAC = 737.28 MSPS, 2x interpolation, I(DACVDD) DAC supply current 21 mA mixer on, QMC on, invsinc off, I(CLKVDD) Clock supply current 55 mA PLL disabled, 20-mA FS output, IF = 7.3 MHz P Power dissipation 1093 mW I(AVDD) Analog supply current(4) 40 mA Mode 4 I(DIGVDD) Digital supply current 710 mA fDAC = 1.47456 GSPS, 2× interpolation, I(DACVDD) DAC supply current mixer on, QMC on, invsinc on, 50 mA PLL enabled, IF = 7.3 MHz, channels A/B/C/D I(CLKVDD) Clock supply current 90 mA output sleep P Power dissipation 1160 mW I(AVDD) Analog supply current(4) 28 mA Mode 5 I(DIGVDD) Digital supply current 17 mA Power-down mode: no clock, DAC on sleep I(DACVDD) DAC supply current mode (clock receiver sleep), 0 mA channels A/B/C/D output sleep, static data I(CLKVDD) Clock supply current 20 mA pattern P Power dissipation 142 mW I(AVDD) Analog supply current(5) 130 mA Mode 6 I(DIGVDD) Digital supply current 570 mA fDAC = 1 GSPS, 2x interpolation, I(DACVDD) DAC supply current 25 mA mixer off, QMC off, invsinc off, I(CLKVDD) Clock supply current 98 mA PLL enabled, 20-mA FS output, IF = 7.3 MHz P Power dissipation 1336 mA I(AVDD) Analog supply current(4) 115 mA Mode 7 I(DIGVDD) Digital supply current 335 mA fDAC = 1 GSPS, 2x interpolation, I(DACVDD) DAC supply current 23 mA mixer off,QMC off, invsinc off, I(CLKVDD) Clock supply current 70 mA PLL disabled, 20-mA FS output, IF = 7.3 MHz P Power dissipation 940 mW I(AVDD) Analog supply current 45 mA Mode 8 I(DIGVDD) Digital supply current 655 mA fDAC = 1.47456 GSPS, 2× interpolation, I(DACVDD) DAC supply current mixer on, QMC on, invsinc on, 30 mA PLL disabled, IF = 7.3 MHz, channels A/B/C/D I(CLKVDD) Clock supply current 95 mA output sleep P Power dissipation 1169 mW (5) Includes AVDD, PLLAVDD, and IOVDD Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): DAC34SH84 |
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