数据搜索系统,热门电子元器件搜索 |
|
CD4066B-Q1 数据表(PDF) 2 Page - Texas Instruments |
|
|
CD4066B-Q1 数据表(HTML) 2 Page - Texas Instruments |
2 / 15 page † All control inputs are protected by the CMOS protection network. NOTES: A.All p substrates are connected to V DD. B. Normal operation control-line biasing: switch on (logic 1), VC = VDD; switch off (logic 0), VC = VSS C. Signal-level range: VSS V ≤ is ≤ VDD Control VC† VDD VSS VSS n n p Out Vos Control Switch In n p Vis CD4066B-Q1 SCHS383 – APRIL 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION ORDERABLE TOP-SIDE TA PACKAGE PART NUMBER MARKING –40°C to 125°C SOIC – D Reel of 2500 CD4066BQDRQ1 CD4066BQ Figure 1. Schematic Diagram of One-of-Four Identical Switches and Associated Control Circuitry 2 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :CD4066B-Q1 |
类似零件编号 - CD4066B-Q1 |
|
类似说明 - CD4066B-Q1 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |