MCM69R737A

•MCM69R819A

8

MOTOROLA FAST SRAM

The table of timing values shows either a

minimum or a maximum limit for each param-

eter. Input requirements are specified from

the external system point of view. Thus, ad-

dress setup time is shown as a minimum

since the system must supply at least that

much time (even though most devices do not

require it). On the other hand, responses from

the memory are specified from the device

point of view. Thus, the access time is shown

as a maximum since the device never pro-

vides data later than that time.

TIMING LIMITS

DEVICE

UNDER

TEST

50

Ω

50

Ω

VDDQ/2

Figure 1. AC Test Load

VOH

VSS

50%

100%

20% tKHKH

Figure 2. Undershoot Voltage

CROSSING POINT

VDDQ

VSS

VTR

VDIF

VCP

VCM*

Figure 3. Differential Inputs/Common Mode Input Voltage

*VCM, the Common Mode Input Voltage, equals VTR – ((VTR – VCP)/2).