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74ACT11648DWR 数据表(PDF) 1 Page - Texas Instruments

部件名 74ACT11648DWR
功能描述  OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

74ACT11648DWR 数据表(HTML) 1 Page - Texas Instruments

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G
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
DIR
CAB
SAB
B1
B2
B3
B4
VCC
VCC
B5
B6
B7
B8
CBA
SBA
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74ACT11648
OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3STATE OUTPUTS
SCAS115 − D3458, MARCH 1990 − REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1993, Texas Instruments Incorporated
2−1
Inputs Are TTL-Voltage Compatible
Independent Registers A and B Buses
Multiplexed Real-Time and Stored Data
Inverting Data Paths
Flow-Through Architecture to Optimize
PCB Layout
Center-Pin V
CC and GND Configurations
Minimize High-Speed Switching Noise
EPICt (Enhanced-Performance Implanted
CMOS) 1-
mm Process
500-mA Typical Latch-Up Immunity
at 125
°C
description
The 74ACT11648 consists of bus transceiver
circuits with 3-state outputs, D-type flip-flops, and
control circuitry arranged for multiplexed trans-
mission of data directly from the data bus or from
the internal storage registers. Data on the A or B bus will be clocked into the registers on the low-to-high
transition of the appropriate clock pin (CAB or CBA). Examples of the four fundamental bus-management
functions that can be performed with the octal bus transceivers and registers are shown in Figure 1.
Enable (G) and direction (DIR) pins are provided to control the transceiver functions. In the transceiver mode,
data present at the high-impedance port may be stored in either register or in both. The select controls (SAB
and SBA) can multiplex stored and real-time (transparent mode) data. The circuitry used for select control will
eliminate the typical decoding glitch that occurs in a mulitplexer during the transition between stored and
real-time data. The direction control determines which bus will receive data when enable G is active (low). In
the isolation mode (control G high), A data may be stored in one register and/or B data may be stored in the
other register.
When an output function is disabled, the input function is still enabled and may be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The 74ACT11648 is characterized for operation from − 40
°C to 85°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.


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