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ADF4360-7 数据表(PDF) 1 Page - Analog Devices

部件名 ADF4360-7
功能描述  Integrated Synthesizer and VCO
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADF4360-7 数据表(HTML) 1 Page - Analog Devices

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Integrated Synthesizer and VCO
Data Sheet
ADF4360-7
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2004-2012 Analog Devices, Inc. All rights reserved.
FEATURES
Output frequency range: 350 MHz to 1800 MHz
Divide-by-2 output
3.0 V to 3.6 V power supply
1.8 V logic compatibility
Integer-N synthesizer
Programmable dual-modulus prescaler 8/9, 16/17
Programmable output power level
3-wire serial interface
Analog and digital lock detect
Hardware and software power-down mode
APPLICATIONS
Wireless handsets (DECT, GSM, PCS, DCS, WCDMA)
Test equipment
Wireless LANs
CATV equipment
GENERAL DESCRIPTION
The ADF4360-7 is an integrated integer-N synthesizer and
voltage controlled oscillator (VCO). The ADF4360-7 center
frequency is set by external inductors. This allows a frequency
range of between 350 MHz to 1800 MHz. In addition, a divide-
by-2 option is available, whereby the user receives an RF output
of between 175 MHz and 900 MHz.
Control of all the on-chip registers is through a simple 3-wire
interface. The device operates with a power supply ranging from
3.0 V to 3.6 V and can be powered down when not in use.
FUNCTIONAL BLOCK DIAGRAM
MUXOUT
CP
VVCO
REFIN
CLK
DATA
LE
AVDD
DVDD
RSET
AGND
DGND
CPGND
CE
VTUNE
CC
CN
L1
L2
RFOUTA
RFOUTB
VCO
CORE
PHASE
COMPARATOR
MUTE
DIVSEL = 2
DIVSEL = 1
N = (BP + A)
LOAD
LOAD
CHARGE
PUMP
OUTPUT
STAGE
INTEGER
REGISTER
13-BIT B
COUNTER
14-BIT R
COUNTER
24-BIT
FUNCTION
LATCH
24-BIT
DATA REGISTER
5-BIT A
COUNTER
PRESCALER
P/P+1
MULTIPLEXER
LOCK
DETECT
÷2
ADF4360-7
Figure 1.


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