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SLA24C02-D 数据表(PDF) 3 Page - Siemens Semiconductor Group |
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SLA24C02-D 数据表(HTML) 3 Page - Siemens Semiconductor Group |
3 / 27 page P-DIP-8-4 P-DSO-8-3 1/2 Kbit (128/256 × 8bit) Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode™ SLx 24C01/02/P Semiconductor Group 3 1998-07-27 Features • Data EEPROM internally organized as 128/256 bytes and 16/32 pages × 8bytes • Page protection mode, flexible page-by-page hardware write protection – Additional protection EEPROM of 16/32 bits, 1 bit per data page – Protection setting for each data page by writing its protection bit – Protection management without switching WP pin • Low power CMOS • V CC = 2.7 to 5.5 V operation • Two wire serial interface bus, I 2C-Bus compatible • Filtered inputs for noise suppression with Schmitt trigger • Clock frequency up to 400 kHz • High programming flexibility – Internal programming voltage – Self timed programming cycle including erase – Byte-write and page-write programming, between 1 and 8 bytes – Typical programming time 5 ms for up to 8 bytes • High reliability – Endurance 10 6 cycles1) – Data retention 40 years 1) – ESD protection 4000 V on all pins • 8 pin DIP/DSO packages • Available for extended temperature ranges – Industrial: − 40 °C to + 85 °C – Automotive: − 40 °C to + 125 °C 1) Values are temperature dependent, for further information please refer to your Siemens Sales office. |
类似零件编号 - SLA24C02-D |
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类似说明 - SLA24C02-D |
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