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MCM6729D 数据表(PDF) 6 Page - Motorola, Inc

部件名 MCM6729D
功能描述  256K x 4 Bit Fast Static Random Access Memory
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

MCM6729D 数据表(HTML) 6 Page - Motorola, Inc

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MCM6729D
6
MOTOROLA FAST SRAM
WRITE CYCLE 2 (E Controlled, See Notes 1 and 2)
6729D–8
6729D–10
6729D–12
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
8
10
12
ns
3
Address Setup Time
tAVEL
0
0
0
ns
Address Valid to End of Write
tAVEH
7
8
9
ns
Enable to End of Write
tELEH,
tELWH
7
8
9
ns
4,5
Data Valid to End of Write
tDVEH
4
5
6
ns
Data Hold Time
tEHDX
0
0
0
ns
Write Recovery Time
tEHAX
0
0
0
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycles.
3. All write cycle timings are referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high impedance condition.
5. If E goes high coincident with or before W goes high, the output will remain in a high impedance condition.
WRITE CYCLE 2
tEHDX
tDVEH
tEHAX
tELWH
tELEH
tAVEL
tAVEH
DATA VALID
tAVAV
HIGH–Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
ORDERING INFORMATION
(Order by Full Part Number)
Motorola Memory Prefix
Part Number
Package (WJ = 400 mil SOJ)
Full Part Numbers — MCM6729DWJ8
MCM6729DWJ10
MCM6729DWJ12
MCM6729DWJ8R
MCM6729DWJ10R
MCM6729DWJ12R
Shipping Method (R = Tape and Reel, Blank = Rails)
Speed (8 = 8 ns, 10 = 10 ns, 12 = 12 ns)
MCM 6729D WJ
XX
X


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类似说明 - MCM6729D

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