MC74LVXT8051

http://onsemi.com

2

Figure 1. LOGIC DIAGRAM

Single−Pole, 8−Position Plus Common Off

X0

13

X1

14

X2

15

X3

12

X4

1

X5

5

X6

2

X7

4

A

11

B

10

C

9

ENABLE

6

MULTIPLEXER/

DEMULTIPLEXER

X

3

ANALOG

INPUTS/

CHANNEL

INPUTS

PIN 8 = GND

COMMON

OUTPUT/

INPUT

OUTPUTS

SELECT

15

16

14

13

12

11

10

2

1

3

4

567

9

8

X2

X1

X0

X3

A

B

C

X4

X6

X

X7

X5

Enable

NC

GND

PIN CONNECTION AND

MARKING DIAGRAM (Top View)

L

L

L

L

H

H

H

H

X

L

L

H

H

L

L

H

H

X

L

H

L

H

L

H

L

H

X

FUNCTION TABLE − MC74LVXT8051

Control Inputs

ON Channels

Enable

Select

CBA

X0

X1

X2

X3

X4

X5

X6

X7

NONE

L

L

L

L

L

L

L

L

H

X = Don’t Care

ORDERING INFORMATION

Device

Package

MC74LVXT8051DG

SOIC−16

(Pb−Free)

48 Units / Rail

MC74LVXT8051DR2G

SOIC−16

(Pb−Free)

2500 Tape & Reel

MC74LVXT8051DTR2G

TSSOP−16*

2500 Tape & Reel

MC74LVXT8051MG

SOEIAJ−16

(Pb−Free)

50 Units / Rail

MC74LVXT8051MELG

SOEIAJ−16

(Pb−Free)

2000 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.