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932S421BGLFT 数据表(PDF) 8 Page - Integrated Device Technology |
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932S421BGLFT 数据表(HTML) 8 Page - Integrated Device Technology |
8 / 23 page IDTTM PCIe Gen2 and QPI Clock for Intel-Based Servers 1340G—01/26/10 ICS932S421B PCIe Gen2 and QPI Clock for Intel-Based Servers 8 Electrical Characteristics - PCICLK/PCICLK_F PARAMETER SYMBOL CONDITIONS* MIN TYP MAX UNITS NOTES Long Accuracy ppm see Tperiod min-max values -100 100 ppm 1,2 Clock period Tperiod 33.33MHz output nominal 29.9970 30 30.0030 ns 2 Absolute Clock period Tpabs 33.33MHz output including jitter 29.4970 30.5030 ns 2 Clock period w/spread TperiodSS 33.33MHz output nominal 30.0722 30.07519 30.0852 ns 2, 3 Absolute Clock period w/spread TpabsSS 33.33MHz output including jitter 29.5722 30.5852 ns 2,3 Clock High Time THIGH 1.5V 12 N/A ns 1 Clock Low Time TLOW 1.5V 12 N/A ns 1 Output Impedance RDSP VO = VDD*(0.5) 12 55 8 1 Output High Voltage VOH IOH = -1 mA 2.4 V 1 Output Low Voltage VOL IOL = 1 mA 0.55 V 1 V OH @MIN = 1.0 V -33 mA 1 VOH@MAX = 3.135 V -33 mA 1 VOL @ MIN = 1.95 V 30 mA 1 VOL @ MAX = 0.4 V 38 mA 1 Edge Rate tslewr/f Rising/Falling edge rate 1 4 V/ns 1 Rise Time tr VOL = 0.4 V, VOH = 2.4 V 0.5 2 ns 1 Fall Time tf VOH = 2.4 V, VOL = 0.4 V 0.5 2 ns 1 Duty Cycle dt1 VT = 1.5 V 45 55 % 1 Group Skew tskew VT = 1.5 V 250 ps 1 Jitter, Cycle to cycle tjcyc-cyc VT = 1.5 V 500 ps 1 *TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5% (unless otherwise specified) 1Guaranteed by design and characterization, not 100% tested in production. 2 All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is at 14.31818MHz 3 Does not apply to 932S431A Output High Current IOH Output Low Current IOL |
类似零件编号 - 932S421BGLFT |
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类似说明 - 932S421BGLFT |
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