PCIe Gen2 and QPI Clock for Intel-Based Servers

1340G—01/26/10

ICS932S421B

PCIe Gen2 and QPI Clock for Intel-Based Servers

4

General Description

Block Diagram

Power Groups

ICS932S421B is a main clock synthesizer for CK410B-generation Intel server platforms. ICS932S421B is driven with a

14.318MHz crystal. It generates CPU outputs up to 400MHz and PCI-Express clocks at 100. The 48 MHz USB clock is an exact

48.000 MHz clock. The ICS932S421B generates all other clocks with less the +/- 100 ppm error.

CPU PLL

CONTROL

LOGIC

XTAL

OSC.

CPUCLK(3:0)

FIXED PLL

48MHz

DIVIDER

DIVIDERS

REF(1:0)

SRCCLK(4:0)

SDATA

SCLK

X1

X2

IREF

FS(C:A)

VTT_PWRGD#/PD

SRC/PCI

PLL

DIVIDERS

TEST_SEL

PCICLK(3:0), PCICLK_F(2:0)

VDD

GND

53

50

Xtal, Ref

1,8

2,7

PCICLK outputs

15,25,28

20

SRCCLK outputs

35

34

Master clock, CPU Analog

12

14

48MHz, PLL_48

47,44,38

41

CPUCLK clocks

Description

Pin Number