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W25Q16BVSFIP 数据表(PDF) 32 Page - Winbond |
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W25Q16BVSFIP 数据表(HTML) 32 Page - Winbond |
32 / 68 page W25Q16BV - 32 - 11.2.15 Word Read Quad I/O (E7h) The Word Read Quad I/O (E7h) instruction is similar to the Fast Read Quad I/O (EBh) instruction except that the lowest Address bit (A0) must equal 0 and only two Dummy clocks are required prior to the data output. The Quad I/O dramatically reduces instruction overhead allowing faster random access for code execution (XIP) directly from the Quad SPI. The Quad Enable bit (QE) of Status Register-2 must be set to enable the Word Read Quad I/O Instruction. Word Read Quad I/O with “Continuous Read Mode” The Word Read Quad I/O instruction can further reduce instruction overhead through setting the “Continuous Read Mode” bits (M7-0) after the input Address bits (A23-0), as shown in figure 14a. The upper nibble of the (M7-4) controls the length of the next Fast Read Quad I/O instruction through the inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t care (“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out clock. If the “Continuous Read Mode” bits (M7-0) equals “Ax” hex, then the next Word Read Quad I/O instruction (after /CS is raised and then lowered) does not require the E7h instruction code, as shown in figure 14b. This reduces the instruction sequence by eight clocks and allows the Read address to be immediately entered after /CS is asserted low. If the “Continuous Read Mode” bits (M7-0) are any value other than “Ax” hex, the next instruction (after /CS is raised and then lowered) requires the first byte instruction code, thus returning to normal operation. A “Continuous Read Mode” Reset instruction can be used to reset (M7-0) before issuing normal instructions (See 11.2.32 for detailed descriptions). Instruction (E7h) Byte 1 Byte 2 Byte 3 40 40 40 51 51 51 62 62 62 73 73 73 Instruction (E7h) Byte 1 Byte 2 Byte 3 40 40 40 40 40 40 51 51 51 51 51 51 62 62 62 62 62 62 73 73 73 73 73 73 Figure 14a. Word Read Quad I/O Instruction Sequence Diagram (M7-0 = 0xh or NOT Axh) |
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