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LE25FU206 数据表(PDF) 15 Page - Sanyo Semicon Device |
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LE25FU206 数据表(HTML) 15 Page - Sanyo Semicon Device |
15 / 21 page LE25FU206 No.A1191-15/21 13. Hardware Data Protection In order to protect against unintentional writing at power-on, the LE25FU206 incorporates a power-on reset function. The following conditions must be met in order to ensure that the power reset circuit will operate stably. No guarantees are given for data in the event of an instantaneous power failure occurring during the writing period. Figure 19 Power-down Timing 14. Software Data Protection The LE25FU206 eliminates the possibility of unintentional operations by not recognizing commands under the following conditions. • When a write command is input and the rising CS edge timing is not in a bus cycle (8 CLK units of SCK) • When the page program data is not in 1-byte increments • When the status register write command is input for 2 bus cycles or more 15. Decoupling Capacitor A 0.1 μF ceramic capacitor must be provided to each device and connected between VDD and VSS in order to ensure that the device will operate stably. VDD(Max) VDD(Min) VDD No Device Access Allowed 0V vBOT tPU_WRITE tPU_READ tPD Program, Erase and Write Command not Allowed |
类似零件编号 - LE25FU206 |
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类似说明 - LE25FU206 |
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