No. 7275-7/13

LC723461W, 723462W

Pin Functions

Pin No.

Pin

I/O

Function

I/O circuit

75 kHz oscillator connections

64

1

XIN

XOUT

I

O

IC testing.

This pin must be connected to ground.

—

63

TEST1

I

Special-purpose ports for key return signal input designed with a low threshold

voltage. When a key matrix is formed in combination with port PB, simultaneous

multiple key presses with up to 3 keys can be detected. The pull-down resistors are

set up for all four pins at the same time with the IOS instruction. This setting cannot

be specified for individual pins. In backup mode, these pins go to the input disabled

state, and the pull-down resistors are disabled after a reset.

5

4

3

2

PA0

PA1

PA2

PA3

I

Unbalanced CMOS outputs. Since these outputs are unbalanced, no diodes are

required to prevent short circuits due to simultaneous multiple key presses. These

outputs go to the high-impedance output state in backup mode. After a reset, they go

to the high-impedance output state and remain in that state until an output instruction

(OUT, SPB, or RPB) is executed.

9

8

7

6

PB0

PB1

PB2

PB3

O

General-purpose I/O ports. Note that there is a mask option that allows these pins to

be used as n-channel open drain ports.

PD0, PD1 can be used as an external interrupt port. The IOS instruction (Pwn = 4, 5)

is used for switching the general-purpose I/O port function, and these ports can be set

to input or output in 1-bit units. (0: input, 1: output)

In backup mode they go to the input disabled high-impedance state.

After a reset, they switch to the general-purpose input port function.

13

12

11

18

17

16

15

14

PC0

PC1

PC2

PC3

INT1/PD0

INT0/PD1

PD2

PD3

I/O

O

General-purpose output ports. Note that PE0 has a shared function as the BEEP

output, and that PE1 has a shared function as a D/A converter output port. Since

these ports are open drain ports, a resistor must be inserted between each port and

VDD. At reset, they are set to the general-purpose output port function .The BEEP

instruction is used to switch the BEEP/PE0 port between the general-purpose output

port and the BEEP output functions. A BEEP instruction with b2 = 0 will set the

BEEP/PE0 port to function as a general-purpose output port. If b2 is set to 1, the

instruction will select the BEEP output function. Bits b0 and b1 switch the frequency of

the BEEP output. This IC supports two BEEP frequencies.

*: When the PE0 port is set to function as the BEEP output, executing an output

instruction for PE0 will only change the value of the internal output latch; it will have

no effect on the output.

The DAC instruction is used to switch the DAC/PE1 port between the general-purpose

output port and DAC output functions. These ports go to the high-impedance state in

backup mode. That state is maintained until an output instruction, a BEEP instruction,

or a DAC instruction is executed.

19

18

BEEP/PE0

DAC/PE1

I/O

Shared function pins used as either general-purpose I/O ports or a serial I/O port.

Note that there is a mask option that allows these pins to be used as n-channel open

drain ports. When used as general-purpose I/O ports, the I/O direction can be

switched in single pin units with the IOS instruction. The IOS instruction is used to

switch the function between the general-purpose I/O port and the serial I/O port

function.

In backup mode, these pins go to the input disabled high-impedance state. After a

reset, the general-purpose input port function is selected.

25

24

23

SCK1/PK1

SO1/PK2

SI1/PK3

Input with built-in

pull-down resistor

N-ch open-drain

CMOS push-pull/

N-ch open-drain

CMOS push-pull/

N-ch open-drain

Continued on next page.

Unbalanced CMOS push-pull