DRV8843PWP Datasheet(数据表) 10 Page - Texas Instruments
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DRV8843PWP Datasheet(HTML) 10 Page - Texas Instruments
– APRIL 2011 – REVISED MAY 2011
Figure 3. Decay Mode
The DRV8843 supports fast decay, slow decay and a mixed decay mode during current chopping. Slow, fast, or
mixed decay mode is selected by the state of the DECAY pin - logic low selects slow decay, open selects mixed
decay operation, and logic high sets fast decay mode. The DECAY pin has both an internal pullup resistor of
approximately 130 k
Ω and an internal pulldown resistor of approximately 80 kΩ. This sets the mixed decay mode
if the pin is left open or undriven. Note that the DECAY pin sets the decay mode for both H-bridges.
Mixed decay mode begins as fast decay, but at a fixed period of time (75% of the PWM cycle) switches to slow
decay mode for the remainder of the fixed PWM period.
After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a fixed period of time
before enabling the current sense circuitry. This blanking time is fixed at 3.75
μs. Note that the blanking time also
sets the minimum on time of the PWM.
nRESET and nSLEEP Operation
The nRESET pin, when driven active low, resets the internal logic. It also disables the H-bridge drivers. All inputs
are ignored while nRESET is active.
Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridges are disabled, the
gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In
this state all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time
(approximately 1 ms) needs to pass before the motor driver becomes fully operational. Note that nRESET and
nSLEEP have internal pulldown resistors of approximately 100 k
Ω. These signals need to be driven to logic high
for device operation.
The DRV8843 is fully protected against undervoltage, overcurrent and overtemperature events.
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