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DRV8843PWP Datasheet(数据表) 5 Page - Texas Instruments

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部件型号  DRV8843PWP
说明  DUAL H-BRIDGE DRIVER IC
下载  19 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
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DRV8843PWP Datasheet(HTML) 5 Page - Texas Instruments

 
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DRV8843
www.ti.com
SLVSAS8A
– APRIL 2011 – REVISED MAY 2011
THERMAL INFORMATION
DRV8843
THERMAL METRIC(1)
PWP
UNITS
28 PINS
θJA
Junction-to-ambient thermal resistance(2)
31.6
θJCtop
Junction-to-case (top) thermal resistance(3)
15.9
θJB
Junction-to-board thermal resistance(4)
5.6
°C/W
ψJT
Junction-to-top characterization parameter(5)
0.2
ψJB
Junction-to-board characterization parameter(6)
5.5
θJCbot
Junction-to-case (bottom) thermal resistance(7)
1.4
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2)
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3)
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4)
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5)
The junction-to-top characterization parameter,
ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining
θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6)
The junction-to-board characterization parameter,
ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining
θJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7)
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VM
Motor power supply voltage range(1)
8.2
45
V
VREF
VREF input voltage(2)
1
3.5
V
IV3P3
V3P3OUT load current
0
1
mA
fPWM
Externally applied PWM frequency
0
100
kHz
(1)
All VM pins must be connected to the same supply voltage.
(2)
Operational at VREF between 0 V and 1 V, but accuracy is degraded.
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLIES
IVM
VM operating supply current
VM = 24 V, fPWM < 50 kHz
5
8
mA
IVMQ
VM sleep mode supply current
VM = 24 V
10
20
μA
VUVLO
VM undervoltage lockout voltage
VM rising
7.8
8.2
V
V3P3OUT REGULATOR
V3P3
V3P3OUT voltage
IOUT = 0 to 1 mA
3.2
3.3
3.4
V
LOGIC-LEVEL INPUTS
VIL
Input low voltage
0.6
0.7
V
VIH
Input high voltage
2.2
5.25
V
VHYS
Input hysteresis
0.3
0.45
0.6
V
IIL
Input low current
VIN = 0
–20
20
μA
IIH
Input high current
VIN = 3.3 V
100
μA
RPD
Internal pulldown resistance
100
k
Ω
nFAULT OUTPUT (OPEN-DRAIN OUTPUT)
VOL
Output low voltage
IO = 5 mA
0.5
V
IOH
Output high leakage current
VO = 3.3 V
1
μA
Copyright
© 2011, Texas Instruments Incorporated
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