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BU3056FV 数据表(PDF) 3 Page - Rohm |
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BU3056FV 数据表(HTML) 3 Page - Rohm |
3 / 5 page 3/4 REV. A ○Package Outline, Appearance of Marker SSOP-B16 ○Pin Function PIN No. PIN Name Function PIN No. PIN Name Function 1 VDD0 Power supply for CLK0 output 9 MODE2 MODE control terminal 2 ( CMOS Input ) 2 VSS0 GND for CLK0 output 10 MODE1 MODE control terminal 1 ( CMOS Input ) 3 CLK0 CLK0 output terminal 11 CLK1 CLK1 output terminal 4 AVDD Analog power supply 12 VSS Logic GND 5 AVSS Analog GND 13 VDD Logic power supply 6 XIN Crystal input terminal 14 CLK2 CLK2 output terminal 7 XOUT Crystal output terminal 15 PDB Power-Down control terminal With pull-up resister 8 TEST TEST terminal is normally OPEN With pull-down resister 16 TEST_B TEST terminal is normally OPEN With pull-down resister ●Cautions on use(BU3056FV) ·BU3056FV must be basically mounted on the board. (If it is not circuit board mounting, it can't sometimes get a character fully.) ·Capacitors 0.1uF need to be placed between 1PIN(VDD0) and 2PIN(VSS0), 4PIN(AVDD) and 5PIN(AVSS), 13PIN(VDD) and 12PIN(VSS). ·It is effective as an EMI countermeasure when the capacitor (less than 1 Ω) which puts ferrite beads in the starting point of the power supply supplied to the BU3056FV by a circuit board and which makes the power supply-GND space have a requested high frequency as to the bypass is inserted. ·For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of wiring. 3056F Lot No. |
类似零件编号 - BU3056FV |
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类似说明 - BU3056FV |
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