9

FN6467.4

May 5, 2011

Once triggered, INT pin stays low and the status bit stays

high. Both interrupt pin and the status bit are automatically

cleared at the end of Command Register I transfer.

3. Interrupt persist; Bits 1 and 0. The interrupt pin and the

interrupt flag is triggered/set when the data sensor

reading is out of the interrupt threshold window after m

consecutive number of integration cycles. The interrupt

persist bits determine m.

Command Register II 01(hex)

The second command register has the following functions:

1. Proximity Sensing Scheme: Bit 7. This bit programs the

function of the proximity detection. Logic 0 of this bit,

Scheme 0, makes full n (4, 8, 12, 16) bits (unsigned)

proximity detection. The range of Scheme 0 proximity count

7, 11, 15) bits (2’s complementary) proximity_less_ambient

detection. The range of Scheme 1 proximity count is from -

Scheme 1 proximity detection is less affected by the

ambient IR noise variation.

2. Modulation Frequency: Bits 6. This bit sets the IR LED

driver’s modulation frequency.

3. Amplitude of IR driver current: Bits 5 and 4. This device

provides current source to drive an external IR LED. The

drive capability can be programmed through Bits 5 and 4.

For example, the device sources 12.5mA out of the IRDR

pin if Bits 5 and 4 are 0.

4. Resolution: Bits 3 and 2. Bits 3 and 2 determine the ADC’s

resolution and the number of clock cycles per conversion

in Internal Timing Mode. Changing the number of clock

cycles does more than just change the resolution of the

device. It also changes the integration time, which is the

period the device’s analog-to-digital (A/D) converter

samples the photodiode current signal for a measurement.

.

5. Range: Bits 1 and 0. The Full Scale Range (FSR) can be

possible values of FSR for the 499k

Data Registers (02 hex and 03 hex)

The device has two 8-bit read-only registers to hold the data

from LSB to MSB for ADC. The most significant bit (MSB) is

accessed at 03 hex, and the least significant bit (LSB) is

accessed at 02 hex. For 16-bit resolution, the data is from

D0 to D15; for 12-bit resolution, the data is from D0 to D11;

for 8-bit resolution, the data is from D0 to D7. The registers

are refreshed after every conversion cycle.

Interrupt Registers (04, 05, 06 and 07 hex)

Registers 04 and 05 hex set the low (LO) threshold for the

interrupt pin and the interrupt flag. 04 hex is the LSB and 05

hex is the MSB. By default, the Interrupt threshold LO is 00

hex for both LSB and MSB.

TABLE 3. INTERRUPT FLAG

BIT 2

OPERATION

0

Interrupt is cleared or not triggered yet

1

Interrupt is triggered

TABLE 4. INTERRUPT PERSIST

BITS 1 TO 0

NUMBER OF INTEGRATION CYCLES

00

1

01

4

10

8

11

16

TABLE 5. PROXIMITY SENSING SCHEME

BIT 7

OPERATION

0

Sensing IR from LED and ambient

1

Sensing IR from LED with ambient IR rejection

TABLE 6. MODULATION FREQUENCY

BITS 6

MODULATION FREQUENCY

(kHz)

0DC

1

360

TABLE 7. CURRENT SOURCE CAPABILITY AT IRDR PIN

BITS 5 TO 4

IRDR PIN SOURCE CURRENT

00

12.5mA IR LED driver

01

25mA IR LED driver

10

50mA IR LED driver

11

100mA IR LED driver

TABLE 8. RESOLUTION/WIDTH

BITS 3 TO 2

NUMBER OF CLOCK CYCLES

n-BIT ADC

00

16

01

12

10

8

11

4

TABLE 9. RANGE/FSR LUX

BITS

1:0

k

RANGE(k)

FSR (LUX) @

ALS SENSING

FSR @ IR

SENSING

00

1

Range1

1,000

Refer to page 4

01

2

Range2

4,000

Refer to page 4

10

3

Range3

16,000

Refer to page 4

11

4

Range4

64,000

Refer to page 4

TABLE 10. DATA REGISTERS

ADDRESS

(hex)

CONTENTS

02

D0 is LSB for 4, 8, 12 or 16-bit resolution, D3 is MSB

for 4-bit resolution, D7 is MSB for 8-bit resolution

03

D15 is MSB for 16-bit resolution, D11 is MSB for

12-bit resolution

ISL29011