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AMC80AIPW 数据表(PDF) 10 Page - Texas Instruments |
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AMC80AIPW 数据表(HTML) 10 Page - Texas Instruments |
10 / 23 page AMC80 SBOS559 – MAY 2011 www.ti.com enable or disable the hardware interrupts. Additional digital inputs are provided for daisy-chaining the interrupt output pin, INT. This configuration is achieved by connecting multiple external temperature sensors (for example, the TMP75) to the board temperature interrupt (BTI) input and/or the GPI/CI input. The chassis intrusion (CI) input is designed to accept an active high signal from an external circuit that latches (for example, when the chassis from a server rack is removed). INTERFACE AND CONTROL The SMBus control lines in the AMC80 include SDA, SCL, and the A0 to A2 address pins, which allow up to eight AMC80 devices to be on the same bus. The AMC80 can only operate as a slave device. The SCL line controls only the serial interface; all other clock-related functions within the AMC80 (such as the ADC and fan counters) operate with a separate asynchronous internal clock. The default power-on SMBus address for the AMC80 is '0101'(A2)(A1)(A0) binary, where (A2)(A1)(A0) is the SMBus address. When using the SMBus interface, a write command always consists of the AMC80 SMBus interface address byte, followed by the internal address register byte, and then the data byte (see Figure 8). See Figure 9 for the read operation timing. There are two cases for a read operation: 1. If the contents of the Internal Address Register are known, simply read the AMC80 with the SMBus interface address byte, followed by the data byte read from the ADC80. 2. If the internal Address Register contents are unknown, write to the AMC80 with the SMBus interface address byte, followed by the internal address register bye. Then restart the serial communication with a read that consist of the SMBus interface address byte, followed by the data byte read from the AMC80. Table 1. Register Overview INTERNAL POWER-ON ADDRESS VALUE REGISTER (HEX) (HEX) NOTES Configuration Register 00 08 Interrupt Status Register 1 01 xx Indeterminate Interrupt Status Register 2 02 xx Indeterminate Interrupt Mask Register 1 03 00 Interrupt Mask Register 2 04 00 Fan Divisor/RST_OUT/OS Register 05 14 FAN1 and FAN2 divisor = 2 (count of 153 = 4400 RPM) OS Configuration/Temperature Resolution 06 x1 Four MSBs are indeterminate Register Conversion Rate Register 07 40 Voltage/Temperature Channel Disable 08 00 Allows voltage monitoring inputs to be disabled Register Input Mode Register 09 00 ADC Control Register 0A 02 Conversion Rate Count Register 0B 40 Value RAM Register 20 to 29 xx Indeterminate Value RAM Register 2A to 3D xx Indeterminate Value RAM Register 3E 80 Value RAM Register 3F 09 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): AMC80 |
类似零件编号 - AMC80AIPW |
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类似说明 - AMC80AIPW |
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