AD5757ACPZ-REEL7 datasheet(2/44 Pages) AD

部件名	AD5757ACPZ-REEL7

功能描述	Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA Output DAC, Dynamic Power Control

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制造商	AD [Analog Devices]

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AD5757

Rev. A | Page 2 of 44

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Companion Products ....................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Detailed Functional Block Diagram .............................................. 3

Specifications..................................................................................... 4

AC Performance Characteristics ................................................ 6

Timing Characteristics ................................................................ 6

Absolute Maximum Ratings............................................................ 9

ESD Caution.................................................................................. 9

Pin Configuration and Function Descriptions........................... 10

Typical Performance Characteristics ........................................... 13

Current Outputs ......................................................................... 13

DC-to-DC Block......................................................................... 18

Reference ..................................................................................... 19

General......................................................................................... 20

Terminology .................................................................................... 21

Theory of Operation ...................................................................... 22

DAC Architecture....................................................................... 22

Power-On State of the AD5757 ................................................ 22

Serial Interface ............................................................................ 22

Transfer Function ....................................................................... 23

Registers ........................................................................................... 24

Programming Sequence to Write/Enable the Output

Correctly ...................................................................................... 25

Changing and Reprogramming the Range ............................. 25

Data Registers ............................................................................. 26

Control Registers........................................................................ 28

Readback Operation .................................................................. 31

Device Features............................................................................... 33

Output Fault................................................................................ 33

Digital Offset and Gain Control............................................... 33

Status Readback During a Write .............................................. 33

Asynchronous Clear................................................................... 33

Packet Error Checking............................................................... 33

Watchdog Timer......................................................................... 34

Output Alert................................................................................ 34

Internal Reference ...................................................................... 34

External Current Setting Resistor ............................................ 34

HART ........................................................................................... 34

Digital Slew Rate Control.......................................................... 35

Power Dissipation Control........................................................ 35

DC-to-DC Converters............................................................... 35

AICC Supply Requirements—Static .......................................... 37

AICC Supply Requirements—Slewing ...................................... 37

External PMOS Mode................................................................ 38

Applications Information .............................................................. 39

Current Output Mode with Internal RSET................................ 39

Precision Voltage Reference Selection..................................... 39

Driving Inductive Loads............................................................ 39

Transient Voltage Protection .................................................... 40

Microprocessor Interfacing....................................................... 40

Layout Guidelines....................................................................... 40

Galvanically Isolated Interface ................................................. 41

Outline Dimensions ....................................................................... 42

Ordering Guide .......................................................................... 42

REVISION HISTORY

5/11—Rev. 0 to Rev. A

Changes Features Section ................................................................ 1

Changes to Figure 2.......................................................................... 3

Changed AVDD Min Parameter from 10.8 V to 9 V ..................... 5

Changes to Pin 22, Pin31, Pin 49 Descriptions .......................... 11

Changes to Pin 58 Descriptions.................................................... 12

Changes to Figure 8, Figure 9, and Figure 10 ............................. 13

Added Figure 23, Renumbered Sequentially .............................. 15

Added Figure 29.............................................................................. 16

Added External PMOS Mode Section and Figure 62 ................ 38

4/11—Revision 0: Initial Version

类似零件编号 - AD5757ACPZ-REEL7

制造商	部件名	数据表	功能描述
Analog Devices	AD5757	909Kb / 31P	Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity Rev. PrD
	AD5757	1Mb / 48P	Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA REV. B
	AD5757	1Mb / 44P	Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output REV. B
	AD5757x	909Kb / 31P	Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity Rev. PrD

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类似说明 - AD5757ACPZ-REEL7

制造商	部件名	数据表	功能描述
Analog Devices	AD5755	2Mb / 48P	Quad Channel, 16-Bit, Serial Input, 4 mA to 20 mA and Voltage Output DAC, Dynamic Power Control REV. 0
	AD5755-1	1Mb / 48P	Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA and Voltage Output DAC,Dynamic Power Control REV. A
	AD420	144Kb / 11P	Serial Input 16-Bit 4 mA-20 mA, 0 mA-20 mA DAC REV. F
	AD5737	1Mb / 44P	Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output REV. B
	AD5421	757Kb / 32P	16-Bit, Serial Input, Loop-Powered, 4 mA to 20 mA DAC REV. 0
	AD5421	726Kb / 36P	16-Bit, Serial Input, Loop-Powered, 4 mA to 20 mA DAC Rev. F
	AD5735	1Mb / 48P	Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA REV. B
	AD5755	1Mb / 34P	Quad Channel, 16-Bit, Serial Input, 4-20mA & Voltage Output DAC, Dynamic Power Control Rev. PrG
	AD5757	909Kb / 31P	Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity Rev. PrD
	AD420	303Kb / 16P	Serial Input 16-Bit 4 mA??0 mA, 0 mA??0 mA DAC Rev. H

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